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Message-ID: <OSBPR01MB20378E5F3D1C2394434F0E0380BA9@OSBPR01MB2037.jpnprd01.prod.outlook.com>
Date:   Thu, 30 Jun 2022 05:24:46 +0000
From:   "tarumizu.kohei@...itsu.com" <tarumizu.kohei@...itsu.com>
To:     "'Luck, Tony'" <tony.luck@...el.com>,
        'Linus Walleij' <linus.walleij@...aro.org>
CC:     Greg KH <gregkh@...uxfoundation.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
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        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
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Subject: RE: [PATCH v5 0/6] Add hardware prefetch control driver for A64FX and
 x86

Hi Tony,

Thanks for the comment.

> Another approach would be to make the set of prefetch settings a task attribute.
> Then set them in the context switch code when the process is about to run on
> a CPU.
> 
> But that assumes you can cheaply change the attributes. If doing so requires
> multiple MSR writes (on x86) it might be a non-starter.

On the x86 and A64FX, each parameter for controlling hardware prefetch
is contained in one register. The current specification makes each
parameter a separate attribute, so we need to write as many times as
there are parameters to change. However it is possible to change the
attribute with one MSR write per core by changing multiple parameters
before the context switch.

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