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Message-ID: <26852797d822462abc1c9f96def7fa42@AcuMS.aculab.com>
Date: Thu, 30 Jun 2022 08:04:43 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Michael Schmitz' <schmitzmic@...il.com>,
Arnd Bergmann <arnd@...nel.org>
CC: Geert Uytterhoeven <geert@...ux-m68k.org>,
scsi <linux-scsi@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Jakub Kicinski <kuba@...nel.org>,
Christoph Hellwig <hch@...radead.org>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Robin Murphy <robin.murphy@....com>,
Linux IOMMU <iommu@...ts.linux-foundation.org>,
Khalid Aziz <khalid@...ehiking.org>,
"Maciej W . Rozycki" <macro@...am.me.uk>,
Matt Wang <wwentao@...are.com>,
Miquel van Smoorenburg <mikevs@...all.net>,
Mark Salyzyn <salyzyn@...roid.com>,
linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
Linux-Arch <linux-arch@...r.kernel.org>,
alpha <linux-alpha@...r.kernel.org>,
linux-m68k <linux-m68k@...ts.linux-m68k.org>,
Parisc List <linux-parisc@...r.kernel.org>,
Denis Efremov <efremov@...ux.com>,
"Michael Ellerman" <mpe@...erman.id.au>,
John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>
Subject: RE: [PATCH v2 3/3] arch/*/: remove CONFIG_VIRT_TO_BUS
From: Michael Schmitz
> Sent: 29 June 2022 00:09
>
> Hi Arnd,
>
> On 29/06/22 09:50, Arnd Bergmann wrote:
> > On Tue, Jun 28, 2022 at 11:03 PM Michael Schmitz <schmitzmic@...il.com> wrote:
> >> On 28/06/22 19:03, Geert Uytterhoeven wrote:
> >>>> The driver allocates bounce buffers using kmalloc if it hits an
> >>>> unaligned data buffer - can such buffers still even happen these days?
> >>> No idea.
> >> Hmmm - I think I'll stick a WARN_ONCE() in there so we know whether this
> >> code path is still being used.
> > kmalloc() guarantees alignment to the next power-of-two size or
> > KMALLOC_MIN_ALIGN, whichever is bigger. On m68k this means it
> > is cacheline aligned.
>
> And all SCSI buffers are allocated using kmalloc? No way at all for user
> space to pass unaligned data?
I didn't think kmalloc() gave any such guarantee about alignment.
There are cache-line alignment requirements on systems with non-coherent
dma, but otherwise the alignment can be much smaller.
One of the allocators adds a header to each item, IIRC that can
lead to 'unexpected' alignments - especially on m68k.
dma_alloc_coherent() does align to next 'power of 2'.
And sometimes you need (eg) 16k allocates that are 16k aligned.
David
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