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Message-ID: <20220630090157.29486-3-xiangsheng.hou@mediatek.com>
Date:   Thu, 30 Jun 2022 17:01:57 +0800
From:   Xiangsheng Hou <xiangsheng.hou@...iatek.com>
To:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <matthias.bgg@...il.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <bin.zhang@...iatek.com>,
        <benliang.zhao@...iatek.com>, <linux-mediatek@...ts.infradead.org>,
        Xiangsheng Hou <xiangsheng.hou@...iatek.com>
Subject: [PATCH v2 2/2] dt-bindings: mediatek: Add assigned clock property and axi clock in example

For mt8173, it is needed to add the axi clock for dma mode.
And it is may needed to adjust default spi frequency.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
---
 .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml  | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b09f..7523d992a614 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -61,6 +61,12 @@ properties:
       - const: axi
       - const: axi_s
 
+  assigned-clocks:
+    maxItems: 1
+
+  assigned-clock-parents:
+    maxItems: 1
+
 required:
   - compatible
   - reg
@@ -82,8 +88,8 @@ examples:
         compatible = "mediatek,mt8173-nor";
         reg = <0 0x1100d000 0 0xe0>;
         interrupts = <1>;
-        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
-        clock-names = "spi", "sf";
+        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
+        clock-names = "spi", "sf", "axi";
         #address-cells = <1>;
         #size-cells = <0>;
 
-- 
2.25.1

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