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Date: Fri, 1 Jul 2022 11:26:43 -0600
From: Rob Herring <robh@...nel.org>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Jens Axboe <axboe@...nel.dk>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 2/5] dt-bindings: arm: msm: Convert kpss-acc driver
Documentation to yaml
On Wed, Jun 29, 2022 at 02:14:38PM +0200, Christian Marangi wrote:
> Convert kpss-acc driver Documentation to yaml.
> The original Documentation was wrong all along. Fix it while we are
> converting it.
> The example was wrong as kpss-acc-v2 should only expose the regs but we
> don't have any driver that expose additional clocks. The kpss-acc driver
> is only specific to v1. For this exact reason, limit all the additional
> bindings (clocks, clock-names, clock-output-names and #clock-cells) to
> v1 and also flag that these bindings should NOT be used for v2.
>
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
> .../bindings/arm/msm/qcom,kpss-acc.txt | 49 ----------
> .../bindings/arm/msm/qcom,kpss-acc.yaml | 93 +++++++++++++++++++
> 2 files changed, 93 insertions(+), 49 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
> create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
> deleted file mode 100644
> index 7f696362a4a1..000000000000
> --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
> +++ /dev/null
> @@ -1,49 +0,0 @@
> -Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
> -
> -The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
> -There is one ACC register region per CPU within the KPSS remapped region as
> -well as an alias register region that remaps accesses to the ACC associated
> -with the CPU accessing the region.
> -
> -PROPERTIES
> -
> -- compatible:
> - Usage: required
> - Value type: <string>
> - Definition: should be one of:
> - "qcom,kpss-acc-v1"
> - "qcom,kpss-acc-v2"
> -
> -- reg:
> - Usage: required
> - Value type: <prop-encoded-array>
> - Definition: the first element specifies the base address and size of
> - the register region. An optional second element specifies
> - the base address and size of the alias register region.
> -
> -- clocks:
> - Usage: required
> - Value type: <prop-encoded-array>
> - Definition: reference to the pll parents.
> -
> -- clock-names:
> - Usage: required
> - Value type: <stringlist>
> - Definition: must be "pll8_vote", "pxo".
> -
> -- clock-output-names:
> - Usage: optional
> - Value type: <string>
> - Definition: Name of the output clock. Typically acpuX_aux where X is a
> - CPU number starting at 0.
> -
> -Example:
> -
> - clock-controller@...8000 {
> - compatible = "qcom,kpss-acc-v2";
> - reg = <0x02088000 0x1000>,
> - <0x02008000 0x1000>;
> - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
> - clock-names = "pll8_vote", "pxo";
> - clock-output-names = "acpu0_aux";
> - };
> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml
> new file mode 100644
> index 000000000000..5e16121d9f0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml
> @@ -0,0 +1,93 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-acc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@...il.com>
> +
> +description: |
> + The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
> + There is one ACC register region per CPU within the KPSS remapped region as
> + well as an alias register region that remaps accesses to the ACC associated
> + with the CPU accessing the region.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,kpss-acc-v1
> + - qcom,kpss-acc-v2
> +
> + reg:
> + items:
> + - description: Base address and size of the register region
> + - description: Optional base address and size of the alias register region
Optional? Need 'minItems: 1' then.
> +
> + clocks:
> + items:
> + - description: phandle to pll8_vote
> + - description: phandle to pxo_board
Not necessarily just a phandle... Needs a better description in terms of
the function of the clock within the KPSS ACC block, not the source.
> +
> + clock-names:
> + items:
> + - const: pll8_vote
> + - const: pxo
> +
> + clock-output-names:
> + description: Name of the aux clock. Krait can have at most 4 cpu.
s/cpu/CPUs/
> + enum:
> + - acpu0_aux
> + - acpu1_aux
> + - acpu2_aux
> + - acpu3_aux
> +
> + '#clock-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,kpss-acc-v1
> +then:
> + required:
> + - clocks
> + - clock-names
> + - clock-output-names
> + - '#clock-cells'
> +else:
> + properties:
> + clocks: false
> + clock-names: false
> + clock-output-names: false
> + '#clock-cells': false
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
> +
> + clock-controller@...8000 {
> + compatible = "qcom,kpss-acc-v1";
> + reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
> + clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
> + clock-names = "pll8_vote", "pxo";
> + clock-output-names = "acpu0_aux";
> + #clock-cells = <0>;
> + };
> +
> + - |
> + clock-controller@...88000 {
> + compatible = "qcom,kpss-acc-v2";
> + reg = <0xf9088000 0x1000>,
> + <0xf9008000 0x1000>;
> + };
> +...
> --
> 2.36.1
>
>
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