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Date:   Fri, 1 Jul 2022 10:16:07 +0200
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
        <alexandre.belloni@...tlin.com>,
        <krzysztof.kozlowski+dt@...aro.org>, <robh+dt@...nel.org>,
        Claudiu Beznea <Claudiu.Beznea@...rochip.com>
CC:     <arnd@...db.de>, <soc@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH] ARM: dts: lan966x: Add mcan1 node.

On 27/06/2022 at 13:05, Kavyasree Kotagiri wrote:
> Add the mcan1 node. By default, keep it disabled.
> 
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>

Looks good to me:
Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>

We'll queue in the next dt branch soon, for integration through arm-soc 
tree.

Thanks, regards,
   Nicolas

> ---
>   arch/arm/boot/dts/lan966x.dtsi | 15 +++++++++++++++
>   1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 3cb02fffe716..25cfa89dde7b 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -473,6 +473,21 @@
>   			status = "disabled";
>   		};
>   
> +		can1: can@...20000 {
> +			compatible = "bosch,m_can";
> +			reg = <0xe0820000 0xfc>, <0x00100000 0x8000>;
> +			reg-names = "m_can", "message_ram";
> +			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "int0", "int1";
> +			clocks = <&clks GCK_ID_MCAN1>, <&clks GCK_ID_MCAN1>;
> +			clock-names = "hclk", "cclk";
> +			assigned-clocks = <&clks GCK_ID_MCAN1>;
> +			assigned-clock-rates = <40000000>;
> +			bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
> +			status = "disabled";
> +		};
> +
>   		reset: reset-controller@...0400c {
>   			compatible = "microchip,lan966x-switch-reset";
>   			reg = <0xe200400c 0x4>;


-- 
Nicolas Ferre

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