linux-kernel - Re: [PATCH 03/10] dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt

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Message-ID: <Yr6ykvru52aDZhFm@hovoldconsulting.com>
Date:   Fri, 1 Jul 2022 10:38:42 +0200
From:   Johan Hovold <johan@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Johan Hovold <johan+linaro@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Stanimir Varbanov <svarbanov@...sol.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 03/10] dt-bindings: PCI: qcom: Enumerate platforms with
 single msi interrupt

On Fri, Jul 01, 2022 at 10:33:35AM +0200, Krzysztof Kozlowski wrote:
> On 29/06/2022 16:09, Johan Hovold wrote:
> > Explicitly enumerate the older platforms that have a single msi host
> > interrupt. This allows for adding further platforms without resorting
> > to nested conditionals.
> > 
> > Drop the redundant comment about older chipsets instead of moving it.
> > 
> > Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> 
> This does not exist in linux-next, so it should be squashed it with the
> previous series.

As mentioned in the cover letter this depends on the MSI series that has
unfortunately not yet been merged.

That series is self-contained and ready to be merged, so this follow-up
does not need to be squashed in.

> > ---
> >  .../devicetree/bindings/pci/qcom,pcie.yaml      | 17 +++++++++++++++--
> >  1 file changed, 15 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > index a1b4fc70e162..8560c65e6f0b 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > @@ -625,7 +625,6 @@ allOf:
> >          - reset-names
> >  
> >      # On newer chipsets support either 1 or 8 msi interrupts
> > -    # On older chipsets it's always 1 msi interrupt
> >    - if:
> >        properties:
> >          compatible:
> > @@ -660,7 +659,21 @@ allOf:
> >                  - const: msi5
> >                  - const: msi6
> >                  - const: msi7
> > -    else:
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - qcom,pcie-apq8064
> > +              - qcom,pcie-apq8084
> > +              - qcom,pcie-ipq4019
> > +              - qcom,pcie-ipq6018
> > +              - qcom,pcie-ipq8064
> > +              - qcom,pcie-ipq8064-v2
> > +              - qcom,pcie-ipq8074
> > +              - qcom,pcie-qcs404
> 
> Otherwise I cannot even check the context...

Yeah, I realise that makes reviewing a bit harder, but hopefully the
maintainer will pick up the MSI series soon.

> 
> > +    then:
> >        properties:
> >          interrupts:
> >            maxItems: 1

Johan