linux-kernel - Re: [PATCH 1/3] drm/bridge: fsl-ldb: Fix mode clock rate validation

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Message-ID: <201c6bb7-ad86-5b89-e9a1-20a5740b8869@denx.de>
Date:   Fri, 1 Jul 2022 10:02:15 +0200
From:   Marek Vasut <marex@...x.de>
To:     Liu Ying <victor.liu@....com>, dri-devel@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org
Cc:     andrzej.hajda@...el.com, narmstrong@...libre.com,
        robert.foss@...aro.org, Laurent.pinchart@...asonboard.com,
        jonas@...boo.se, jernej.skrabec@...il.com, airlied@...ux.ie,
        daniel@...ll.ch, sam@...nborg.org, linux-imx@....com
Subject: Re: [PATCH 1/3] drm/bridge: fsl-ldb: Fix mode clock rate validation

On 7/1/22 08:56, Liu Ying wrote:
> With LVDS dual link, up to 160MHz mode clock rate is supported.
> With LVDS single link, up to 80MHz mode clock rate is supported.
> Fix mode clock rate validation by swapping the maximum mode clock
> rates of the two link modes.
> 
> Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
> Cc: Andrzej Hajda <andrzej.hajda@...el.com>
> Cc: Neil Armstrong <narmstrong@...libre.com>
> Cc: Robert Foss <robert.foss@...aro.org>
> Cc: Laurent Pinchart <Laurent.pinchart@...asonboard.com>
> Cc: Jonas Karlman <jonas@...boo.se>
> Cc: Jernej Skrabec <jernej.skrabec@...il.com>
> Cc: David Airlie <airlied@...ux.ie>
> Cc: Daniel Vetter <daniel@...ll.ch>
> Cc: Sam Ravnborg <sam@...nborg.org>
> Cc: Marek Vasut <marex@...x.de>
> Cc: NXP Linux Team <linux-imx@....com>
> Signed-off-by: Liu Ying <victor.liu@....com>

Reviewed-by: Marek Vasut <marex@...x.de>