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Message-ID: <20220701125639.3sbafn7hsfsi6e7y@pengutronix.de>
Date: Fri, 1 Jul 2022 14:56:39 +0200
From: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: Thierry Reding <thierry.reding@...il.com>,
Lee Jones <lee.jones@...aro.org>,
Daire McNamara <daire.mcnamara@...rochip.com>,
linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 2/2] MAINTAINERS: add pwm to PolarFire SoC entry
Hello,
On Fri, Jun 17, 2022 at 12:44:43PM +0100, Conor Dooley wrote:
> Add the newly introduced pwm driver to the existing PolarFire SoC entry.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f1b4b77daa5f..d0b39fa4f309 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17091,6 +17091,7 @@ L: linux-riscv@...ts.infradead.org
> S: Supported
> F: arch/riscv/boot/dts/microchip/
> F: drivers/mailbox/mailbox-mpfs.c
> +F: drivers/pwm/pwm-microchip-core.c
> F: drivers/soc/microchip/
> F: include/soc/microchip/mpfs.h
The change looks okish to me, but it doesn't make sense without patch
1/2. So I'm discarding this one from our patchwork instance, too.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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