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Message-ID: <20243196.sWSEgdgrri@phil>
Date: Fri, 01 Jul 2022 15:07:45 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
linux-arm-kernel@...ts.infradead.org
Cc: Samuel Holland <samuel@...lland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Maxime Ripard <mripard@...nel.org>, Ondrej Jirman <x@....cz>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev,
Samuel Holland <samuel@...lland.org>
Subject: Re: [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation
Am Sonntag, 26. Juni 2022, 04:11:45 CEST schrieb Samuel Holland:
> Starting with the D1/D1s/T113 SoC, Allwinner changed the layout of the
> pinctrl registers. This new layout widens the drive level field, which
> affects the pull register offset and the overall bank size.
>
> As a first step to support this, combine the register and offset
> calculation functions, and refactor the math to depend on one constant
> for field widths instead of three. This minimizes the code size impact
> of making some of the factors dynamic.
>
> While rewriting these functions, move them to the implementation file,
> since that is the only file where they are used. And make the comment
> more generic, without mentioning specific offsets/sizes.
>
> The callers are updated to expect a shifted mask, and to use consistent
> terminology (reg/shift/mask/val).
>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
On a D1-Nezha
Tested-by: Heiko Stuebner <heiko@...ech.de>
Change also looks good
Reviewed-by: Heiko Stuebner <heiko@...ech.de>
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