[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1656684800-31278-1-git-send-email-quic_krichai@quicinc.com>
Date: Fri, 1 Jul 2022 19:43:17 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org, dmitry.baryshkov@...aro.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>
Subject: [PATCH v3 0/2] PCI: Restrict pci transactions after pci suspend
If the endpoint device state is D0 and irq's are not freed, then
kernel try to mask interrupts in system suspend path by writing
in to the vector table (for MSIX interrupts) and config space (for MSI's).
These transactions are initiated in the pm suspend after pcie clocks got
disabled as part of platform driver pm suspend call. Due to it, these
transactions are resulting in un-clocked access and eventually to crashes.
So added a logic in qcom driver to restrict these unclocked access.
And updated the logic to check the link state before masking
or unmasking the interrupts.
Krishna chaitanya chundru (2):
PCI: qcom: Add system PM support
PCI: qcom: Restrict pci transactions after pci suspend
drivers/pci/controller/dwc/pcie-designware-host.c | 14 ++-
drivers/pci/controller/dwc/pcie-qcom.c | 114 +++++++++++++++++++++-
2 files changed, 124 insertions(+), 4 deletions(-)
--
2.7.4
Powered by blists - more mailing lists