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Message-ID: <2116734.Icojqenx9y@jernej-laptop>
Date: Sat, 02 Jul 2022 22:29:35 +0200
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: Chen-Yu Tsai <wens@...e.org>,
Linus Walleij <linus.walleij@...aro.org>,
Samuel Holland <samuel@...lland.org>
Cc: Samuel Holland <samuel@...lland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Maxime Ripard <mripard@...nel.org>, Ondrej Jirman <x@....cz>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation
Dne nedelja, 26. junij 2022 ob 04:11:45 CEST je Samuel Holland napisal(a):
> Starting with the D1/D1s/T113 SoC, Allwinner changed the layout of the
> pinctrl registers. This new layout widens the drive level field, which
> affects the pull register offset and the overall bank size.
>
> As a first step to support this, combine the register and offset
> calculation functions, and refactor the math to depend on one constant
> for field widths instead of three. This minimizes the code size impact
> of making some of the factors dynamic.
>
> While rewriting these functions, move them to the implementation file,
> since that is the only file where they are used. And make the comment
> more generic, without mentioning specific offsets/sizes.
>
> The callers are updated to expect a shifted mask, and to use consistent
> terminology (reg/shift/mask/val).
>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
Nice cleanup.
Reviewed-by: Jernej Skrabec <jernej.skrabec@...il.com>
Best regards,
Jernej
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