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Message-Id: <20220703091132.1412063-11-peng.fan@oss.nxp.com>
Date: Sun, 3 Jul 2022 17:11:32 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: djakov@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
festevam@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, abel.vesa@....com,
abailon@...libre.com, l.stach@...gutronix.de,
laurent.pinchart@...asonboard.com, marex@...x.de,
paul.elder@...asonboard.com, Markus.Niebel@...tq-group.com,
aford173@...il.com, cw00.choi@...sung.com,
kyungmin.park@...sung.com, myungjoo.ham@...sung.com
Cc: kernel@...gutronix.de, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-imx@....com,
abelvesa@...nel.org, Peng Fan <peng.fan@....com>
Subject: [PATCH V3 10/10] arm64: dts: imx8mp: add NoC node
From: Peng Fan <peng.fan@....com>
Add i.MX8MP NoC node to make the interconnect i.MX8MP driver could work.
Currently dynamic frequency scaling of the i.MX8MP NoC has not been
supported, only NoC initial settings are configured by interconnect
driver.
Signed-off-by: Peng Fan <peng.fan@....com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index eb2d516278eb..13a2ee77d3c6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/interconnect/fsl,imx8mp.h>
#include <dt-bindings/power/imx8mp-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -1019,6 +1020,27 @@ eqos: ethernet@...f0000 {
};
};
+ noc: interconnect@...00000 {
+ compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc", "syscon";
+ reg = <0x32700000 0x100000>;
+ clocks = <&clk IMX8MP_CLK_NOC>;
+ #interconnect-cells = <1>;
+
+ operating-points-v2 = <&noc_opp_table>;
+
+ noc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-200M {
+ opp-hz = /bits/ 64 <200000000>;
+ };
+
+ opp-1000M {
+ opp-hz = /bits/ 64 <1000000000>;
+ };
+ };
+ };
+
aips4: bus@...00000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32c00000 0x400000>;
--
2.25.1
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