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Message-ID: <OS0PR01MB592289B120F4E92962A0E1C186BF9@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date: Sun, 3 Jul 2022 10:08:39 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
CC: Marc Kleine-Budde <mkl@...gutronix.de>,
Wolfgang Grandegger <wg@...ndegger.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
"linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 6/6] can: sja1000: Add support for RZ/N1 SJA1000 CAN
Controller
Hi Uwe,
Thanks for the feedback.
> Subject: Re: [PATCH 6/6] can: sja1000: Add support for RZ/N1 SJA1000 CAN
> Controller
>
> On Sun, Jul 03, 2022 at 07:15:16AM +0000, Biju Das wrote:
> > Hi Marc and Uwe,
> >
> > > Subject: Re: [PATCH 6/6] can: sja1000: Add support for RZ/N1 SJA1000
> > > CAN Controller
> > >
> > > On 02.07.2022 15:01:30, Biju Das wrote:
> > > > The SJA1000 CAN controller on RZ/N1 SoC has some differences
> > > > compared to others like it has no clock divider register (CDR)
> > > > support and it has no HW loopback(HW doesn't see tx messages on
> rx).
> > > >
> > > > This patch adds support for RZ/N1 SJA1000 CAN Controller.
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > > > ---
> > > > drivers/net/can/sja1000/sja1000_platform.c | 34
> > > > ++++++++++++++++++----
> > > > 1 file changed, 29 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/drivers/net/can/sja1000/sja1000_platform.c
> > > > b/drivers/net/can/sja1000/sja1000_platform.c
> > > > index 5f3d362e0da5..8e63af76a013 100644
> > > > --- a/drivers/net/can/sja1000/sja1000_platform.c
> > > > +++ b/drivers/net/can/sja1000/sja1000_platform.c
> > > [...]
> > > > @@ -262,6 +276,16 @@ static int sp_probe(struct platform_device
> *pdev)
> > > > priv->reg_base = addr;
> > > >
> > > > if (of) {
> > > > + clk = devm_clk_get_optional(&pdev->dev, "can_clk");
> > > > + if (IS_ERR(clk))
> > > > + return dev_err_probe(&pdev->dev, PTR_ERR(clk),
> "no CAN
> > > clk");
> > > > +
> > > > + if (clk) {
> > > > + priv->can.clock.freq = clk_get_rate(clk) / 2;
> > > > + if (!priv->can.clock.freq)
> > > > + return dev_err_probe(&pdev->dev, -EINVAL,
> "Zero
> > > CAN clk rate");
> > > > + }
> > >
> > > There's no clk_prepare_enable in the driver. You might go the quick
> > > and dirty way an enable the clock right here. IIRC there's a new
> > > convenience function to get and enable a clock, managed bei devm.
> > > Uwe (Cc'ed) can point you in the right direction.
> >
> > + clk
> >
> > As per the patch history devm version for clk_prepare_enable is
> rejected[1], so the individual drivers implemented the same using
> devm_add_action_or_reset [2].
> > So shall I implement devm version here as well?
>
> You want to make use of 7ef9651e9792b08eb310c6beb202cbc947f43cab (which
> is currently in next). If you cherry-pick this to an older kernel
> version, make sure to also pick
> 8b3d743fc9e2542822826890b482afabf0e7522a.
Ok will use "devm_clk_get_optional_enabled" and send V2.
Cheers,
Biju
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