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Date:   Sat,  2 Jul 2022 22:56:12 -0500
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Johan Hovold <johan+linaro@...nel.org>
Cc:     linux-clk@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>,
        Andy Gross <agross@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Stephen Boyd <sboyd@...nel.org>
Subject: Re: [PATCH] clk: qcom: gcc-sc8280xp: use phy-mux clock for PCIe

On Tue, 28 Jun 2022 10:57:07 +0200, Johan Hovold wrote:
> Use the new phy-mux clock implementation for the PCIe pipe clock muxes
> so that the pipe clock source is set to the QMP PHY PLL when the
> downstream pipe clock is enabled and restored to the always-on XO when
> it is again disabled.
> 
> This is needed to prevent the corresponding GDSC from hanging when
> enabling or disabling the PCIe power domain, something which requires a
> ticking source.
> 
> [...]

Applied, thanks!

[1/1] clk: qcom: gcc-sc8280xp: use phy-mux clock for PCIe
      commit: 9410fb940114444f37a0b787bd84077b61d76bf6

Best regards,
-- 
Bjorn Andersson <bjorn.andersson@...aro.org>

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