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Message-ID: <CAK9rFnzUGrdahqKM8DDx9Xo-v4Tqs086XSUoHf6wS2fbqK2OHQ@mail.gmail.com>
Date: Sun, 3 Jul 2022 14:05:40 -0700
From: Brad Larson <brad@...sando.io>
To: Pratyush Yadav <p.yadav@...com>
Cc: Linux ARM <linux-arm-kernel@...ts.infradead.org>,
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"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v5 11/15] spi: cadence-quadspi: Add compatible for AMD
Pensando Elba SoC
Hi Pratyush,
On Tue, Jun 14, 2022 at 1:49 AM Pratyush Yadav <p.yadav@...com> wrote:
> This is needed for TI's SoCs as well. APB and AHB accesses are
> independent of each other on the interconnect and can be racy. I wrote a
> couple patches [0][1] to fix this on TI's fork. I never got around to
> sending them upstream. It would be great if you can pick those up. They
> fix the race in all paths, not just indirect write.
>
> I would also prefer if we do this unconditionally. I don't think it has
> much downside even on platforms that do not strictly need this.
>
> [0] https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/drivers/spi/spi-cadence-quadspi.c?h=ti-linux-5.10.y&id=027f03a8512086e5ef05dc4e4ff53b2628848f95
> [1] https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/drivers/spi/spi-cadence-quadspi.c?h=ti-linux-5.10.y&id=4c367e58bab7d3f9c470c3778441f73546f20398
Let's get Elba specific support in first and then in a separate patch
go for the unconditional. An extra op for devices for which its not
currently done will result in questions I can't answer.
Regards,
Brad
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