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Message-ID: <CAHp75VcmEasZu53kZFO9R0Y=gZau-XFpAPd2a00deHv3PO1ZOg@mail.gmail.com>
Date: Mon, 4 Jul 2022 22:29:13 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: ChiaEn Wu <peterwu.pub@...il.com>
Cc: Lee Jones <lee.jones@...aro.org>,
Daniel Thompson <daniel.thompson@...aro.org>,
Jingoo Han <jingoohan1@...il.com>, Pavel Machek <pavel@....cz>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Sebastian Reichel <sre@...nel.org>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jonathan Cameron <jic23@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Guenter Roeck <linux@...ck-us.net>,
"Krogerus, Heikki" <heikki.krogerus@...ux.intel.com>,
Helge Deller <deller@....de>,
ChiaEn Wu <chiaen_wu@...htek.com>,
Alice Chen <alice_chen@...htek.com>,
cy_huang <cy_huang@...htek.com>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Linux LED Subsystem <linux-leds@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
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linux-iio <linux-iio@...r.kernel.org>,
"open list:FRAMEBUFFER LAYER" <linux-fbdev@...r.kernel.org>,
szuni chen <szunichen@...il.com>
Subject: Re: [PATCH v4 07/13] mfd: mt6370: Add Mediatek MT6370 support
On Mon, Jul 4, 2022 at 7:41 AM ChiaEn Wu <peterwu.pub@...il.com> wrote:
>
> Add Mediatek MT6370 MFD support.
...
> + This driver can also be built as a module. If so the module
If so,
> + will be called "mt6370.ko".
".ko" part is not needed.
To all your patches in the series where this applies.
...
> +static const struct regmap_irq mt6370_irqs[] = {
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHGON, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_TREG, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_AICR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_MIVR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_PWR_RDY, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FL_CHG_VINOVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VSYSUV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VSYSOV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VBATOV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_VINOVPCHG, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TS_BAT_COLD, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TS_BAT_COOL, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TS_BAT_WARM, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TS_BAT_HOT, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TS_STATC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_FAULT, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_STATC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_TMR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_BATABS, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_ADPBAD, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_RVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_TSHUTDOWN, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_IINMEAS, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_ICCMEAS, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHGDET_DONE, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_WDTMR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_SSFINISH, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_RECHG, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_TERM, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHG_IEOC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_ADC_DONE, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_PUMPX_DONE, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_BST_BATUV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_BST_MIDOV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_BST_OLP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_ATTACH, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DETACH, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_HVDCP_STPDONE, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_HVDCP_VBUSDET_DONE, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_HVDCP_DET, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_CHGDET, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DCDT, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHG_VGOK, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHG_WDTMR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHG_UC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHG_OC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DIRCHG_OV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OVPCTRL_SWON, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OVPCTRL_UVP_D, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OVPCTRL_UVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OVPCTRL_OVP_D, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OVPCTRL_OVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED_STRBPIN, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED_TORPIN, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED_TX, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED_LVF, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_SHORT, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_SHORT, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_STRB, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_STRB, 8),
> + REGMAP_IRQ_REG_LINE(mT6370_IRQ_FLED2_STRB_TO, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_STRB_TO, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_TOR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_TOR, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_OTP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_VDDA_OVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_VDDA_UV, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_LDO_OC, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_BLED_OCP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_BLED_OVP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DSV_VNEG_OCP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DSV_VPOS_OCP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DSV_BST_OCP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DSV_VNEG_SCP, 8),
> + REGMAP_IRQ_REG_LINE(MT6370_IRQ_DSV_VPOS_SCP, 8)
Leave a comma here.
> +};
...
> +static const struct resource mt6370_regulator_irqs[] = {
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_DSV_VPOS_SCP, "db_vpos_scp"),
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_DSV_VNEG_SCP, "db_vneg_scp"),
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_DSV_BST_OCP, "db_vbst_ocp"),
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_DSV_VPOS_OCP, "db_vpos_ocp"),
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_DSV_VNEG_OCP, "db_vneg_ocp"),
> + DEFINE_RES_IRQ_NAMED(MT6370_IRQ_LDO_OC, "ldo_oc")
Leave a comma here.
> +};
> +
> +static const struct mfd_cell mt6370_devices[] = {
> + MFD_CELL_OF("adc", NULL, NULL, 0, 0, "mediatek,mt6370-adc"),
> + MFD_CELL_OF("charger", NULL, NULL, 0, 0, "mediatek,mt6370-charger"),
> + MFD_CELL_OF("backlight", NULL, NULL, 0, 0, "mediatek,mt6370-backlight"),
> + MFD_CELL_OF("flashlight", NULL, NULL, 0, 0, "mediatek,mt6370-flashlight"),
> + MFD_CELL_OF("indicator", NULL, NULL, 0, 0, "mediatek,mt6370-indicator"),
> + MFD_CELL_OF("tcpc", NULL, NULL, 0, 0, "mediatek,mt6370-tcpc"),
> + MFD_CELL_RES("regulator", mt6370_regulator_irqs)
Leave a comma here.
> +};
--
With Best Regards,
Andy Shevchenko
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