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Message-ID: <b68aff8b-7a0f-810b-2e13-95f3734e0e18@microchip.com>
Date:   Mon, 4 Jul 2022 06:47:49 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <p.zabel@...gutronix.de>, <sre@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>
CC:     <linux-arm-kernel@...ts.infradead.org>, <linux-pm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 9/9] ARM: dts: at91: sama7g5: add reset-controller node

On 10.06.2022 12:24, Claudiu Beznea wrote:
> Add reset controller node.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>

Applied to at91-dt, thanks!

> ---
>  arch/arm/boot/dts/sama7g5.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index a37e3a80392d..bb6d71e6dfeb 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -198,6 +198,13 @@ pmc: pmc@...18000 {
>  			clock-names = "td_slck", "md_slck", "main_xtal";
>  		};
>  
> +		reset_controller: reset-controller@...1d000 {
> +			compatible = "microchip,sama7g5-rstc";
> +			reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
> +			#reset-cells = <1>;
> +			clocks = <&clk32k 0>;
> +		};
> +
>  		shdwc: shdwc@...1d010 {
>  			compatible = "microchip,sama7g5-shdwc", "syscon";
>  			reg = <0xe001d010 0x10>;

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