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Message-ID: <20220704100028.19932-5-tinghan.shen@mediatek.com>
Date:   Mon, 4 Jul 2022 18:00:16 +0800
From:   Tinghan Shen <tinghan.shen@...iatek.com>
To:     Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
        "Will Deacon" <will@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        "Enric Balletbo i Serra" <enric.balletbo@...labora.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>,
        Weiyi Lu <weiyi.lu@...iatek.com>
CC:     <iommu@...ts.linux-foundation.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Fengquan Chen <fengquan.chen@...iatek.com>
Subject: [PATCH v1 04/16] arm64: dts: mt8195: Disable watchdog external reset signal

Disable external output reset signal in first round of watchdog reset
to reserve wdt reset reason for debugging watchdog issue.

Signed-off-by: Fengquan Chen <fengquan.chen@...iatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 066c14989708..436687ba826f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -327,6 +327,7 @@
 		watchdog: watchdog@...07000 {
 			compatible = "mediatek,mt8195-wdt",
 				     "mediatek,mt6589-wdt";
+			mediatek,disable-extrst;
 			reg = <0 0x10007000 0 0x100>;
 		};
 
-- 
2.18.0

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