linux-kernel - [PATCH v1 09/16] arm64: dts: mt8195: Add spmi node

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Message-ID: <20220704100028.19932-10-tinghan.shen@mediatek.com>
Date:   Mon, 4 Jul 2022 18:00:21 +0800
From:   Tinghan Shen <tinghan.shen@...iatek.com>
To:     Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
        "Will Deacon" <will@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        "Enric Balletbo i Serra" <enric.balletbo@...labora.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>,
        Weiyi Lu <weiyi.lu@...iatek.com>
CC:     <iommu@...ts.linux-foundation.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Henry Chen <henryc.chen@...iatek.com>
Subject: [PATCH v1 09/16] arm64: dts: mt8195: Add spmi node

Add spmi node to mt8195.

Signed-off-by: Henry Chen <henryc.chen@...iatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index d52e140d9271..456612d9d508 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -698,6 +698,21 @@
 			assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
 		};
 
+		spmi: spmi@...27000 {
+			compatible = "mediatek,mt8195-spmi";
+			reg = <0 0x10027000 0 0x000e00>,
+			      <0 0x10029000 0 0x000100>;
+			reg-names = "pmif", "spmimst";
+			clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+				 <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+				 <&topckgen CLK_TOP_SPMI_M_MST>;
+			clock-names = "pmif_sys_ck",
+				      "pmif_tmr_ck",
+				      "spmimst_clk_mux";
+			assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC>;
+			assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
+		};
+
 		scp_adsp: clock-controller@...20000 {
 			compatible = "mediatek,mt8195-scp_adsp";
 			reg = <0 0x10720000 0 0x1000>;
-- 
2.18.0