[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220704100028.19932-11-tinghan.shen@mediatek.com>
Date: Mon, 4 Jul 2022 18:00:22 +0800
From: Tinghan Shen <tinghan.shen@...iatek.com>
To: Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Tinghan Shen <tinghan.shen@...iatek.com>,
Weiyi Lu <weiyi.lu@...iatek.com>
CC: <iommu@...ts.linux-foundation.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [PATCH v1 10/16] arm64: dts: mt8195: Add scp node
Add scp node for mt8195.
Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 456612d9d508..543bb719a445 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -713,6 +713,16 @@
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
+ scp: scp@...00000 {
+ compatible = "mediatek,mt8195-scp";
+ reg = <0 0x10500000 0 0x100000>,
+ <0 0x10720000 0 0xe0000>,
+ <0 0x10700000 0 0x8000>;
+ reg-names = "sram", "cfg", "l1tcm";
+ interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
+ status = "disabled";
+ };
+
scp_adsp: clock-controller@...20000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
Powered by blists - more mailing lists