lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <181a5cc7-c274-06c0-908b-874d48e24913@linaro.org>
Date:   Mon, 4 Jul 2022 15:56:11 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Robert Marko <robimarko@...il.com>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Rob Herring <robh+dt@...nel.org>,
        krzysztof.kozlowski+dt@...aro.org,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        Devicetree List <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: ipq8074: add reset to SDHCI

On 04/07/2022 14:34, Robert Marko wrote:
> On Mon, 4 Jul 2022 at 14:29, Krzysztof Kozlowski
> <krzysztof.kozlowski@...aro.org> wrote:
>>
>> On 04/07/2022 13:44, Robert Marko wrote:
>>> Add reset to SDHCI controller so it can be reset to avoid timeout issues
>>> after software reset due to bootloader set configuration.
>>>
>>> Signed-off-by: Robert Marko <robimarko@...il.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> index ddafc7de6c5f..d685ca1969a3 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> @@ -482,6 +482,7 @@ sdhc_1: mmc@...4900 {
>>>                                <&gcc GCC_SDCC1_APPS_CLK>,
>>>                                <&xo>;
>>>                       clock-names = "iface", "core", "xo";
>>> +                     resets = <&gcc GCC_SDCC1_BCR>;
>>
>> I looked at the bindings and they do not allow reset property, so does
>> it depend on anything?
> 
> Hi Krzysztof,
> It seems like the driver changes [1] were merged at the same time as
> when bindings
> were being converted and nobody ever follow up with documenting the property.
> 
> I can document the property and send a v2 if that's OK?

Yes, please. Otherwise DTS change will fail checks so basically should
not be accepted.

Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ