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Message-ID: <29e72784-2c7b-1c31-357c-012cafe57a00@microchip.com>
Date: Mon, 4 Jul 2022 16:06:15 +0200
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
To: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
<arnd@...db.de>, <alexandre.belloni@...tlin.com>,
<krzysztof.kozlowski+dt@...aro.org>, <claudiu.beznea@...rochip.com>
CC: <soc@...nel.org>, <robh+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH v2] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl
settings.
On 04/07/2022 at 15:58, Kavyasree Kotagiri wrote:
> On pcb8291, Flexcom3 usart has only tx and rx pins.
> Cleaningup usart3 pinctrl settings.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
Fine with me as well:
Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
> ---
> v1 -> v2:
> - Keep both tx and rx pins into one node.
>
> arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++--------------
> 1 file changed, 4 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3c7e3a7d6f14..d56d2054c38d 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -19,19 +19,9 @@ aliases {
> };
>
> &gpio {
> - fc_shrd7_pins: fc_shrd7-pins {
> - pins = "GPIO_49";
> - function = "fc_shrd7";
> - };
> -
> - fc_shrd8_pins: fc_shrd8-pins {
> - pins = "GPIO_54";
> - function = "fc_shrd8";
> - };
> -
> - fc3_b_pins: fcb3-spi-pins {
> - /* SCK, RXD, TXD */
> - pins = "GPIO_51", "GPIO_52", "GPIO_53";
> + fc3_b_pins: fc3-b-pins {
> + /* RX, TX */
> + pins = "GPIO_52", "GPIO_53";
> function = "fc3_b";
> };
>
> @@ -53,7 +43,7 @@ &flx3 {
> status = "okay";
>
> usart3: serial@200 {
> - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
> + pinctrl-0 = <&fc3_b_pins>;
> pinctrl-names = "default";
> status = "okay";
> };
--
Nicolas Ferre
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