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Message-ID: <b80e4c9c229e70abeba869d553811631b0ee7ded.camel@mediatek.com>
Date: Tue, 5 Jul 2022 11:55:32 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Bo-Chen Chen <rex-bc.chen@...iatek.com>, <chunkuang.hu@...nel.org>,
<p.zabel@...gutronix.de>, <daniel@...ll.ch>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <matthias.bgg@...il.com>,
<airlied@...ux.ie>
CC: <msp@...libre.com>, <granquet@...libre.com>,
<jitao.shi@...iatek.com>, <wenst@...omium.org>,
<angelogioacchino.delregno@...labora.com>,
<xinlei.lee@...iatek.com>, <liangxu.xu@...iatek.com>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v15 12/16] drm/mediatek: dpi: move the csc_enable bit to
SoC config
Hi, Bo-Chen:
On Fri, 2022-07-01 at 11:58 +0800, Bo-Chen Chen wrote:
> From: Guillaume Ranquet <granquet@...libre.com>
>
> Add flexibility by moving the csc_enable bit to SoC specific config
Applied to mediatek-drm-next [1], thanks.
[1]
https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next__;!!CTRNKA9wMg0ARbw!zWEwCacmscK6lKiUsSJg-EhOk-w28LbLdjhkF_xNfenUSrdS0RCxyNYy1_Rq5Q$
Regards,
CK
>
> Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
> Reviewed-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Reviewed-by: CK Hu <ck.hu@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 0b75a4ce8261..3085033becbd 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -127,6 +127,7 @@ struct mtk_dpi_yc_limit {
> * @hvsize_mask: Mask of HSIZE and VSIZE mask (no shift).
> * @channel_swap_shift: Shift value of channel swap.
> * @yuv422_en_bit: Enable bit of yuv422.
> + * @csc_enable_bit: Enable bit of CSC.
> */
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> @@ -141,6 +142,7 @@ struct mtk_dpi_conf {
> u32 hvsize_mask;
> u32 channel_swap_shift;
> u32 yuv422_en_bit;
> + u32 csc_enable_bit;
> };
>
> static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val,
> u32 mask)
> @@ -384,7 +386,8 @@ static void mtk_dpi_config_yuv422_enable(struct
> mtk_dpi *dpi, bool enable)
>
> static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool
> enable)
> {
> - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0,
> CSC_ENABLE);
> + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit :
> 0,
> + dpi->conf->csc_enable_bit);
> }
>
> static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool
> enable)
> @@ -826,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = {
> .hvsize_mask = HSIZE_MASK,
> .channel_swap_shift = CH_SWAP,
> .yuv422_en_bit = YUV422_EN,
> + .csc_enable_bit = CSC_ENABLE,
> };
>
> static const struct mtk_dpi_conf mt2701_conf = {
> @@ -841,6 +845,7 @@ static const struct mtk_dpi_conf mt2701_conf = {
> .hvsize_mask = HSIZE_MASK,
> .channel_swap_shift = CH_SWAP,
> .yuv422_en_bit = YUV422_EN,
> + .csc_enable_bit = CSC_ENABLE,
> };
>
> static const struct mtk_dpi_conf mt8183_conf = {
> @@ -855,6 +860,7 @@ static const struct mtk_dpi_conf mt8183_conf = {
> .hvsize_mask = HSIZE_MASK,
> .channel_swap_shift = CH_SWAP,
> .yuv422_en_bit = YUV422_EN,
> + .csc_enable_bit = CSC_ENABLE,
> };
>
> static const struct mtk_dpi_conf mt8192_conf = {
> @@ -869,6 +875,7 @@ static const struct mtk_dpi_conf mt8192_conf = {
> .hvsize_mask = HSIZE_MASK,
> .channel_swap_shift = CH_SWAP,
> .yuv422_en_bit = YUV422_EN,
> + .csc_enable_bit = CSC_ENABLE,
> };
>
> static int mtk_dpi_probe(struct platform_device *pdev)
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