[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220705133917.8405-13-ansuelsmth@gmail.com>
Date: Tue, 5 Jul 2022 15:39:16 +0200
From: Christian Marangi <ansuelsmth@...il.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Christian Marangi <ansuelsmth@...il.com>,
Jonathan McDowell <noodles@...th.li>
Subject: [PATCH 12/13] ARM: dts: qcom: add speedbin efuse nvmem binding
Add speedbin efuse nvmem binding needed for the opp table for the CPU
freqs.
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
Tested-by: Jonathan McDowell <noodles@...th.li>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 777851bed95a..45e713387deb 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -862,6 +862,9 @@ tsens_calib: calib@400 {
tsens_calib_backup: calib_backup@410 {
reg = <0x410 0xb>;
};
+ speedbin_efuse: speedbin@c0 {
+ reg = <0xc0 0x4>;
+ };
};
gcc: clock-controller@...000 {
--
2.36.1
Powered by blists - more mailing lists