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Message-ID: <20220705195125.GA78912@bhelgaas>
Date:   Tue, 5 Jul 2022 14:51:25 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
        yuji2.ishikawa@...hiba.co.jp, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH] dt-bindings: pci: toshiba,visconti-pcie: Update the
 common clock properties

On Fri, May 20, 2022 at 05:56:48PM +0900, Nobuhiro Iwamatsu wrote:
> The clock for this driver switched to the common clock controller driver.
> Therefore, update common clock properties for PCIe controller in the binding
> document.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
> Acked-by: Rob Herring <robh@...nel.org>

Rob, does your ack mean you want me to pick this up?  It looks like
you merged the original 17c1b16340f0 ("dt-bindings: pci: Add DT
binding for Toshiba Visconti PCIe controller")?

> ---
>  .../devicetree/bindings/pci/toshiba,visconti-pcie.yaml         | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
> index 30b6396d83c8..b9d0484606cc 100644
> --- a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
> @@ -69,6 +69,7 @@ unevaluatedProperties: false
>  
>  examples:
>    - |
> +    #include <dt-bindings/clock/toshiba,tmpv770x.h>
>      #include <dt-bindings/interrupt-controller/irq.h>
>      #include <dt-bindings/interrupt-controller/arm-gic.h>
>  
> @@ -102,7 +103,7 @@ examples:
>                   0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
>                   0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
>                   0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
> -            clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
> +            clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>;
>              clock-names = "ref", "core", "aux";
>              max-link-speed = <2>;
>          };
> -- 
> 2.36.0
> 
> 

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