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Message-ID: <8f07796a-d9a2-3301-aafb-7fbec4d5b1a2@microchip.com>
Date: Tue, 5 Jul 2022 20:33:39 +0000
From: <Conor.Dooley@...rochip.com>
To: <sudeep.holla@....com>
CC: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<paul.walmsley@...ive.com>, <palmer@...belt.com>,
<aou@...s.berkeley.edu>, <Daire.McNamara@...rochip.com>,
<Conor.Dooley@...rochip.com>, <niklas.cassel@....com>,
<damien.lemoal@...nsource.wdc.com>, <geert@...ux-m68k.org>,
<zong.li@...ive.com>, <kernel@...il.dk>, <hahnjo@...njo.de>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <Brice.Goglin@...ia.fr>
Subject: Re: [PATCH 0/5] RISC-V: Add cpu-map topology information nodes
On 05/07/2022 21:19, Sudeep Holla wrote:
> On Tue, Jul 05, 2022 at 08:04:31PM +0100, Conor Dooley wrote:
>> From: Conor Dooley <conor.dooley@...rochip.com>
>>
>> It was reported to me that the Hive Unmatched incorrectly reports
>> its topology to hwloc, but the StarFive VisionFive did in [0] &
>> a subsequent off-list email from Brice (the hwloc maintainer).
>> This turned out not to be entirely true, the /downstream/ version
>> of the VisionFive does work correctly but not upstream, as the
>> downstream devicetree has a cpu-map node that was added recently.
>>
>> This series adds a cpu-map node to all upstream devicetrees, which
>> I have tested on mpfs & fu540. The first patch is lifted directly
>> from the downstream StarFive devicetree.
>>
>
> Reviewed-by: Sudeep Holla <sudeep.holla@....com>
>
> I would recommend to have sane defaults in core risc-v code in case of
> absence of /cpu-map node as it is optional. The reason I mentioned is that
> Conor mentioned how the default values in absence of the node looked quite
> wrong. I don't know if it is possible on RISC-V but on ARM64 we do have
> default values if arch_topology fails to set based on DT/ACPI.
>
Yeah the defaults are all -1. I'll add some sane defaults for a v2.
Thanks,
Conor.
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