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Message-Id: <20220705094239.17174-8-johan+linaro@kernel.org>
Date: Tue, 5 Jul 2022 11:42:03 +0200
From: Johan Hovold <johan+linaro@...nel.org>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Kishon Vijay Abraham I <kishon@...com>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH 07/43] dt-bindings: phy: qcom,msm8996-qmp-pcie: clean up constraints
Drop the compatible conditional and tighten the property constraints.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
---
.../phy/qcom,msm8996-qmp-pcie-phy.yaml | 65 +++++--------------
1 file changed, 18 insertions(+), 47 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
index 14fd86fd91ec..b73bf5c06358 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
@@ -19,10 +19,8 @@ properties:
const: qcom,msm8996-qmp-pcie-phy
reg:
- minItems: 1
items:
- description: Address and length of PHY's common serdes block.
- - description: Address and length of PHY's DP_COM control block.
"#address-cells":
enum: [ 1, 2 ]
@@ -33,20 +31,28 @@ properties:
ranges: true
clocks:
- minItems: 1
- maxItems: 4
+ items:
+ - description: PHY aux clock.
+ - description: PHY config clock.
+ - description: 19.2 MHz ref clock.
clock-names:
- minItems: 1
- maxItems: 4
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: ref
resets:
- minItems: 1
- maxItems: 3
+ items:
+ - description: Reset of PHY block.
+ - description: PHY common block reset.
+ - description: PHY's ahb cfg block reset.
reset-names:
- minItems: 1
- maxItems: 3
+ items:
+ - const: phy
+ - const: common
+ - const: cfg
vdda-phy-supply:
description:
@@ -56,10 +62,6 @@ properties:
description:
Phandle to 1.8V regulator supply to PHY refclk pll block.
- vddp-ref-clk-supply:
- description:
- Phandle to a regulator supply to any specific refclk pll block.
-
patternProperties:
"^phy@[0-9a-f]+$":
type: object
@@ -77,38 +79,7 @@ required:
- clock-names
- resets
- reset-names
+ - vdda-phy-supply
+ - vdda-pll-supply
additionalProperties: false
-
-allOf:
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8996-qmp-pcie-phy
- then:
- properties:
- clocks:
- items:
- - description: PHY aux clock.
- - description: PHY config clock.
- - description: 19.2 MHz ref clock.
- clock-names:
- items:
- - const: aux
- - const: cfg_ahb
- - const: ref
- resets:
- items:
- - description: Reset of PHY block.
- - description: PHY common block reset.
- - description: PHY's ahb cfg block reset.
- reset-names:
- items:
- - const: phy
- - const: common
- - const: cfg
- required:
- - vdda-phy-supply
- - vdda-pll-supply
--
2.35.1
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