lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YsQQfwqmiQ7O3FdY@hovoldconsulting.com>
Date:   Tue, 5 Jul 2022 12:20:47 +0200
From:   Johan Hovold <johan@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Johan Hovold <johan+linaro@...nel.org>,
        Vinod Koul <vkoul@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 06/43] dt-bindings: phy: qcom,qmp: split out
 msm8996-qmp-pcie-phy

On Tue, Jul 05, 2022 at 12:08:36PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 11:42, Johan Hovold wrote:
> > The QMP PHY DT schema is getting unwieldy. Break out the odd-bird
> > msm8996-qmp-pcie-phy which is the only QMP PHY that uses separate
> > "per-lane" nodes.
> > 
> > Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> > ---
> >  .../phy/qcom,msm8996-qmp-pcie-phy.yaml        | 114 ++++++++++++++++++
> >  .../devicetree/bindings/phy/qcom,qmp-phy.yaml |  32 -----
> >  2 files changed, 114 insertions(+), 32 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
> > new file mode 100644
> > index 000000000000..14fd86fd91ec
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
> > @@ -0,0 +1,114 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +
> 
> No line break
> 
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/phy/qcom,msm8996-qmp-pcie-phy.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> 
> Drop the quotes from two above.

This comes from the current binding. I can clean that one up first.

> > +
> > +title: Qualcomm QMP PHY controller (MSM8996 PCIe)
> > +
> > +maintainers:
> > +  - Vinod Koul <vkoul@...nel.org>
> > +
> > +description:
> > +  QMP PHY controller supports physical layer functionality for a number of
> > +  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
> > +
> > +properties:
> > +  compatible:
> > +    const: qcom,msm8996-qmp-pcie-phy
> > +
> > +  reg:
> > +    minItems: 1
> > +    items:
> > +      - description: Address and length of PHY's common serdes block.
> > +      - description: Address and length of PHY's DP_COM control block.
> 
> Are two reg items applicable here?

No, but see below.

> > +
> > +  "#address-cells":
> > +    enum: [ 1, 2 ]
> > +
> > +  "#size-cells":
> > +    enum: [ 1, 2 ]
> > +
> > +  ranges: true
> > +
> > +  clocks:
> > +    minItems: 1
> > +    maxItems: 4
> 
> Define clocks here, not in allOf:if:then.

To remain sane, and to help reviewers, I decided not to do changes to
the binding while splitting it up which would only make them harder
to review.

Hence the split followed by cleanup/tightening of constraints.

> How about an example?

That's also a new addition to the binding and goes in a later separate
patch.

Johan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ