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Message-Id: <20220705114032.22787-3-johan+linaro@kernel.org>
Date: Tue, 5 Jul 2022 13:40:20 +0200
From: Johan Hovold <johan+linaro@...nel.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH 02/14] arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
Add the missing '#clock-cells' properties to the PCIe QMP PHY nodes.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 53e0b57c13e4..f45a6cca397f 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1892,6 +1892,8 @@ pcie0_lane: phy@...6200 {
clock-names = "pipe0";
#phy-cells = <0>;
+
+ #clock-cells = <0>;
clock-output-names = "pcie_0_pipe_clk";
};
};
@@ -1998,6 +2000,8 @@ pcie1_lane: phy@...e200 {
clock-names = "pipe0";
#phy-cells = <0>;
+
+ #clock-cells = <0>;
clock-output-names = "pcie_1_pipe_clk";
};
};
@@ -2104,6 +2108,8 @@ pcie2_lane: phy@...6200 {
clock-names = "pipe0";
#phy-cells = <0>;
+
+ #clock-cells = <0>;
clock-output-names = "pcie_2_pipe_clk";
};
};
--
2.35.1
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