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Message-ID: <dcb5db59-df69-e25f-0389-e1617b4805aa@sholland.org>
Date: Mon, 4 Jul 2022 21:38:38 -0500
From: Samuel Holland <samuel@...lland.org>
To: qianfanguijin@....com
Cc: linux-sunxi@...ts.linux.dev,
Andre Przywara <andre.przywara@....com>,
Evgeny Boger <boger@...enboard.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/2] ARM: dts: bananapi-m2-ultra: Enable USB0_OTG and
HOST support
Hi Qianfan,
On 5/18/22 5:17 AM, qianfanguijin@....com wrote:
> From: qianfan Zhao <qianfanguijin@....com>
>
> let USB0 work at OTG mode.
>
> Signed-off-by: qianfan Zhao <qianfanguijin@....com>
> ---
> .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 39 +++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> index 28197bbcb1d5..b3421e67967d 100644
> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -122,6 +122,10 @@ &de {
> status = "okay";
> };
>
> +&ehci0 {
> + status = "okay";
> +};
> +
> &ehci1 {
> status = "okay";
> };
> @@ -164,6 +168,7 @@ axp22x: pmic@34 {
> reg = <0x34>;
> interrupt-parent = <&nmi_intc>;
> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + x-powers,drive-vbus-en;
> };
> };
>
> @@ -199,6 +204,10 @@ &mmc2 {
> status = "okay";
> };
>
> +&ohci0 {
> + status = "okay";
> +};
> +
> &ohci1 {
> status = "okay";
> };
> @@ -216,6 +225,15 @@ &pio {
> vcc-pe-supply = <®_eldo1>;
> vcc-pf-supply = <®_dcdc1>;
> vcc-pg-supply = <®_dldo1>;
> +
> + /* USB0_DRVVBUS connected to both the PMIC.N_VBUSEN and PI13,
> + * we chose PMIC.N_VBUSEN for control, so set the gpio as
> + * input mode here.
> + */
Toggling a GPIO is going to be more efficient and have lower latency than a PMIC
register write over I2C. (And there are several comments in the USB PHY driver
about latency being important.) So I would prefer to model this as a
GPIO-controlled regulator, and leave N_VBUSEN as an input.
Regards,
Samuel
> + usb0_vbus_enable_gpio: usb0-vbus-enable-gpio {
> + pins = "PI13";
> + function = "gpio_in";
> + };
> };
>
> ®_aldo2 {
> @@ -298,6 +316,11 @@ ®_dldo4 {
> regulator-name = "vdd2v5-sata";
> };
>
> +®_drivevbus {
> + regulator-name = "usb0-vbus";
> + status = "okay";
> +};
> +
> ®_eldo3 {
> regulator-min-microvolt = <1200000>;
> regulator-max-microvolt = <1200000>;
> @@ -333,7 +356,23 @@ bluetooth {
> };
> };
>
> +&usb_otg {
> + dr_mode = "otg";
> + status = "okay";
> +};
> +
> +&usb_power_supply {
> + status = "okay";
> +};
> +
> &usbphy {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb0_vbus_enable_gpio>;
> +
> + usb0_id_det-gpios = <&pio 8 4 GPIO_ACTIVE_HIGH>; /* PI4 */
> + usb0_vbus_det-gpios = <&pio 8 8 GPIO_ACTIVE_HIGH>; /* PI8 */
> + usb0_vbus_power-supply = <&usb_power_supply>;
> + usb0_vbus-supply = <®_drivevbus>;
> usb1_vbus-supply = <®_vcc5v0>;
> usb2_vbus-supply = <®_vcc5v0>;
> status = "okay";
>
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