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Message-ID: <CAK8P3a1HoB74TA9EKJFuPLuw_zJfy_p7fwkm0M45+jaGkK6ivA@mail.gmail.com>
Date: Wed, 6 Jul 2022 17:01:07 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Qin Jian <qinjian@...lus1.com>
Cc: Stephen Boyd <sboyd@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Russell King - ARM Linux <linux@...linux.org.uk>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
SoC Team <soc@...nel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
DTML <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>
Subject: Re: [PATCH v20 00/11] Add Sunplus SP7021 SoC Support
On Tue, Jun 28, 2022 at 8:26 AM Qin Jian <qinjian@...lus1.com> wrote:
>
> This patch series add Sunplus SP7021 SoC support.
>
> Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many
> peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a
> single chip. It is designed for industrial control.
>
> SP7021 consists of two chips (dies) in a package. One is called C-chip
> (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level
> process (22 nm) for high performance computing. The other is called P-
> chip (peripheral chip). It has many peripherals and an ARM A926 added
> especially for real-time control. P-chip is made for customers. It adopts
> low-level process (ex: 0.11 um) to reduce cost.
>
As far as I can tell, all review comments have been fully addressed,
but I'm missing an Ack from Stephen Boyd so I can apply it through
the SoC tree.
Arnd
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