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Message-ID: <ceaca6d7-958d-ade6-9ee5-5e70bc57bbd7@linaro.org>
Date: Wed, 6 Jul 2022 18:13:43 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Krishna chaitanya chundru <quic_krichai@...cinc.com>,
helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org
Subject: Re: [PATCH v4 0/2] PCI: Restrict pci transactions after pci suspend
On 06/07/2022 17:40, Krishna chaitanya chundru wrote:
> If the endpoint device state is D0 and irq's are not freed, then
> kernel try to mask interrupts in system suspend path by writing
> in to the vector table (for MSIX interrupts) and config space (for MSI's).
>
> These transactions are initiated in the pm suspend after pcie clocks got
> disabled as part of platform driver pm suspend call. Due to it, these
> transactions are resulting in un-clocked access and eventually to crashes.
>
> So added a logic in qcom driver to restrict these unclocked access.
> And updated the logic to check the link state before masking
> or unmasking the interrupts.
Please do not send new versions as replies to previous ones. This breaks
threading for the reviewers.
> Krishna chaitanya chundru (2):
> PCI: qcom: Add system PM support
> PCI: qcom: Restrict pci transactions after pci suspend
>
> drivers/pci/controller/dwc/pcie-designware-host.c | 14 ++-
> drivers/pci/controller/dwc/pcie-qcom.c | 121 +++++++++++++++++++++-
> 2 files changed, 131 insertions(+), 4 deletions(-)
--
With best wishes
Dmitry
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