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Message-ID: <53aa543b-a109-046d-beda-91a15ef5a487@opensource.wdc.com>
Date: Wed, 6 Jul 2022 12:49:47 +0900
From: Damien Le Moal <damien.lemoal@...nsource.wdc.com>
To: Conor Dooley <mail@...chuod.ie>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Niklas Cassel <niklas.cassel@....com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Zong Li <zong.li@...ive.com>,
Emil Renner Berthing <kernel@...il.dk>,
Jonas Hahnfeld <hahnjo@...njo.de>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, Brice Goglin <Brice.Goglin@...ia.fr>
Subject: Re: [PATCH 5/5] riscv: dts: canaan: Add k210 topology information
On 7/6/22 04:04, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> The k210 has no cpu-map node, so tools like hwloc cannot correctly
> parse the topology. Add the node using the existing node labels.
>
> Reported-by: Brice Goglin <Brice.Goglin@...ia.fr>
> Link: https://github.com/open-mpi/hwloc/issues/536
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Looks good to me.
Reviewed-by: Damien Le Moal <damien.lemoal@...nsource.wdc.com>
> ---
> arch/riscv/boot/dts/canaan/k210.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/canaan/k210.dtsi b/arch/riscv/boot/dts/canaan/k210.dtsi
> index 44d338514761..ec944d1537dc 100644
> --- a/arch/riscv/boot/dts/canaan/k210.dtsi
> +++ b/arch/riscv/boot/dts/canaan/k210.dtsi
> @@ -65,6 +65,18 @@ cpu1_intc: interrupt-controller {
> compatible = "riscv,cpu-intc";
> };
> };
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> +
> + core1 {
> + cpu = <&cpu1>;
> + };
> + };
> + };
> };
>
> sram: memory@...00000 {
--
Damien Le Moal
Western Digital Research
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