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Message-ID: <20220706165406.117349-1-tmaimon77@gmail.com>
Date: Wed, 6 Jul 2022 19:53:50 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: <avifishman70@...il.com>, <tali.perry1@...il.com>,
<joel@....id.au>, <venture@...gle.com>, <yuenn@...gle.com>,
<benjaminfair@...gle.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <p.zabel@...gutronix.de>,
<gregkh@...uxfoundation.org>, <daniel.lezcano@...aro.org>,
<tglx@...utronix.de>, <wim@...ux-watchdog.org>,
<linux@...ck-us.net>, <catalin.marinas@....com>, <will@...nel.org>,
<arnd@...db.de>, <olof@...om.net>, <jirislaby@...nel.org>,
<shawnguo@...nel.org>, <bjorn.andersson@...aro.org>,
<geert+renesas@...der.be>, <marcel.ziswiler@...adex.com>,
<vkoul@...nel.org>, <biju.das.jz@...renesas.com>,
<nobuhiro1.iwamatsu@...hiba.co.jp>, <robert.hancock@...ian.com>,
<j.neuschaefer@....net>, <lkundrak@...sk>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-serial@...r.kernel.org>,
<linux-watchdog@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Tomer Maimon <tmaimon77@...il.com>
Subject: [PATCH v7 00/16] Introduce Nuvoton Arbel NPCM8XX BMC SoC
This patchset adds initial support for the Nuvoton
Arbel NPCM8XX Board Management controller (BMC) SoC family.
The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC.
The NPCM8XX computing subsystem comprises a quadcore ARM
Cortex A35 ARM-V8 architecture.
This patchset adds minimal architecture and drivers such as:
Clocksource, Clock, Reset, and WD.
Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX.
This patchset was tested on the Arbel NPCM8XX evaluation board.
Addressed comments from:
- Philipp Zabel: https://www.spinics.net/lists/arm-kernel/msg993305.html
Changes since version 6:
- NPCM reset driver
- Modify warning message.
- dt-bindings: serial: 8250: Add npcm845 compatible string patch accepted, due
to it the patch removed from the patchset.
Changes since version 5:
- NPCM8XX clock driver
- Remove refclk if devm_of_clk_add_hw_provider function failed.
- NPCM8XX clock source driver
- Remove NPCM8XX TIMER_OF_DECLARE support, using the same as NPCM7XX.
Changes since version 4:
- NPCM8XX clock driver
- Use the same quote in the dt-binding file.
Changes since version 3:
- NPCM8XX clock driver
- Rename NPCM8xx clock dt-binding header file.
- Remove unused structures.
- Improve Handling the clocks registration.
- NPCM reset driver
- Add ref phandle to dt-binding.
Changes since version 2:
- Remove NPCM8xx WDT compatible patch.
- Remove NPCM8xx UART compatible patch.
- NPCM8XX clock driver
- Add debug new line.
- Add 25M fixed rate clock.
- Remove unused clocks and clock name from dt-binding.
- NPCM reset driver
- Revert to npcm7xx dt-binding.
- Skip dt binding quotes.
- Adding DTS backward compatibility.
- Remove NPCM8xx binding include file.
- Warp commit message.
- NPCM8XX device tree:
- Remove unused clock nodes (used in the clock driver)
- Modify gcr and rst node names.
Changes since version 1:
- NPCM8XX clock driver
- Modify dt-binding.
- Remove unsed definition and include.
- Include alphabetically.
- Use clock devm.
- NPCM reset driver
- Modify dt-binding.
- Modify syscon name.
- Add syscon support to NPCM7XX dts reset node.
- use data structure.
- NPCM8XX device tree:
- Modify evb compatible name.
- Add NPCM7xx compatible.
- Remove disable nodes from the EVB DTS.
Tomer Maimon (16):
dt-bindings: timer: npcm: Add npcm845 compatible string
dt-bindings: watchdog: npcm: Add npcm845 compatible string
dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
clk: npcm8xx: add clock controller
dt-bindings: reset: npcm: add GCR syscon property
ARM: dts: nuvoton: add reset syscon property
reset: npcm: using syscon instead of device data
dt-bindings: reset: npcm: Add support for NPCM8XX
reset: npcm: Add NPCM8XX support
dt-bindings: arm: npcm: Add maintainer
dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
arm64: dts: nuvoton: Add initial NPCM8XX device tree
arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
arm64: defconfig: Add Nuvoton NPCM family support
.../devicetree/bindings/arm/npcm/npcm.yaml | 7 +
.../bindings/arm/npcm/nuvoton,gcr.yaml | 2 +
.../bindings/clock/nuvoton,npcm845-clk.yaml | 49 ++
.../bindings/reset/nuvoton,npcm750-reset.yaml | 10 +-
.../bindings/timer/nuvoton,npcm7xx-timer.yaml | 2 +
.../bindings/watchdog/nuvoton,npcm-wdt.txt | 3 +-
MAINTAINERS | 2 +
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 +
arch/arm64/Kconfig.platforms | 11 +
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/nuvoton/Makefile | 2 +
.../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 170 +++++
.../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 30 +
.../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 76 +++
arch/arm64/configs/defconfig | 3 +
drivers/clk/Kconfig | 6 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-npcm8xx.c | 600 ++++++++++++++++++
drivers/reset/reset-npcm.c | 207 +++++-
.../dt-bindings/clock/nuvoton,npcm845-clk.h | 49 ++
20 files changed, 1196 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi
create mode 100644 drivers/clk/clk-npcm8xx.c
create mode 100644 include/dt-bindings/clock/nuvoton,npcm845-clk.h
--
2.33.0
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