linux-kernel - Re: [PATCH 1/3] drm/bridge: fsl-ldb: Fix mode clock rate validation

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Message-ID: <CAG3jFyun7NkLCy+bM0XHNRPrk6_kt7z8aB4Ud+4HdeNhffQydA@mail.gmail.com>
Date:   Wed, 6 Jul 2022 15:34:40 +0200
From:   Robert Foss <robert.foss@...aro.org>
To:     Marek Vasut <marex@...x.de>
Cc:     Liu Ying <victor.liu@....com>, dri-devel@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org, andrzej.hajda@...el.com,
        narmstrong@...libre.com, Laurent.pinchart@...asonboard.com,
        jonas@...boo.se, jernej.skrabec@...il.com, airlied@...ux.ie,
        daniel@...ll.ch, sam@...nborg.org, linux-imx@....com
Subject: Re: [PATCH 1/3] drm/bridge: fsl-ldb: Fix mode clock rate validation

On Fri, 1 Jul 2022 at 13:00, Marek Vasut <marex@...x.de> wrote:
>
> On 7/1/22 08:56, Liu Ying wrote:
> > With LVDS dual link, up to 160MHz mode clock rate is supported.
> > With LVDS single link, up to 80MHz mode clock rate is supported.
> > Fix mode clock rate validation by swapping the maximum mode clock
> > rates of the two link modes.
> >
> > Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
> > Cc: Andrzej Hajda <andrzej.hajda@...el.com>
> > Cc: Neil Armstrong <narmstrong@...libre.com>
> > Cc: Robert Foss <robert.foss@...aro.org>
> > Cc: Laurent Pinchart <Laurent.pinchart@...asonboard.com>
> > Cc: Jonas Karlman <jonas@...boo.se>
> > Cc: Jernej Skrabec <jernej.skrabec@...il.com>
> > Cc: David Airlie <airlied@...ux.ie>
> > Cc: Daniel Vetter <daniel@...ll.ch>
> > Cc: Sam Ravnborg <sam@...nborg.org>
> > Cc: Marek Vasut <marex@...x.de>
> > Cc: NXP Linux Team <linux-imx@....com>
> > Signed-off-by: Liu Ying <victor.liu@....com>
>
> Reviewed-by: Marek Vasut <marex@...x.de>

Applied 1-2/3 to drm-misc-next. Picked Mareks patch for 3/3 since it
was submitted first and is identical.