linux-kernel - [RFC 4/4] arm64: arch-topology move arm64 to the generic store_cpu

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Message-Id: <20220707220436.4105443-5-mail@conchuod.ie>
Date:   Thu,  7 Jul 2022 23:04:37 +0100
From:   Conor Dooley <mail@...chuod.ie>
To:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Sudeep Holla <sudeep.holla@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "Rafael J . Wysocki" <rafael@...nel.org>
Cc:     Daire McNamara <daire.mcnamara@...rochip.com>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Niklas Cassel <niklas.cassel@....com>,
        Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
        Geert Uytterhoeven <geert@...ux-m68k.org>,
        Zong Li <zong.li@...ive.com>,
        Emil Renner Berthing <kernel@...il.dk>,
        Jonas Hahnfeld <hahnjo@...njo.de>, Guo Ren <guoren@...nel.org>,
        Anup Patel <anup@...infault.org>,
        Atish Patra <atishp@...shpatra.org>,
        Changbin Du <changbin.du@...el.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        Rob Herring <robh@...nel.org>, Marc Zyngier <maz@...nel.org>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Brice Goglin <Brice.Goglin@...ia.fr>
Subject: [RFC 4/4] arm64: arch-topology move arm64 to the generic store_cpu_topology()

From: Conor Dooley <conor.dooley@...rochip.com>

The default implementation of store_cpu_topology() was derived from the
arm64 implementation, but with the mpidr bits removed. Extract the mpidr
bits from the arch implementation to the callsites & use the generic
version.

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
 arch/arm64/kernel/smp.c      | 16 +++++++++++++--
 arch/arm64/kernel/topology.c | 40 ------------------------------------
 2 files changed, 14 insertions(+), 42 deletions(-)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 62ed361a4376..9e8acaa4c2f7 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -234,7 +234,12 @@ asmlinkage notrace void secondary_start_kernel(void)
 	 * Log the CPU info before it is marked online and might get read.
 	 */
 	cpuinfo_store_cpu();
-	store_cpu_topology(cpu);
+
+	/*
+	 * Uniprocessor systems can rely on default topology values
+	 */
+	if (!(mpidr & MPIDR_UP_BITMASK))
+		store_cpu_topology(cpu);
 
 	/*
 	 * Enable GIC and timers.
@@ -719,6 +724,7 @@ void __init smp_init_cpus(void)
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	const struct cpu_operations *ops;
+	u64 mpidr;
 	int err;
 	unsigned int cpu;
 	unsigned int this_cpu;
@@ -726,7 +732,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	init_cpu_topology();
 
 	this_cpu = smp_processor_id();
-	store_cpu_topology(this_cpu);
+	mpidr = read_cpuid_mpidr();
+
+	/*
+	 * Uniprocessor systems can rely on default topology values
+	 */
+	if (!(mpidr & MPIDR_UP_BITMASK))
+		store_cpu_topology(this_cpu);
 	numa_store_cpu_info(this_cpu);
 	numa_add_cpu(this_cpu);
 
diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
index 869ffc4d4484..7889a00f5487 100644
--- a/arch/arm64/kernel/topology.c
+++ b/arch/arm64/kernel/topology.c
@@ -22,46 +22,6 @@
 #include <asm/cputype.h>
 #include <asm/topology.h>
 
-void store_cpu_topology(unsigned int cpuid)
-{
-	struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
-	u64 mpidr;
-
-	if (cpuid_topo->package_id != -1)
-		goto topology_populated;
-
-	mpidr = read_cpuid_mpidr();
-
-	/* Uniprocessor systems can rely on default topology values */
-	if (mpidr & MPIDR_UP_BITMASK)
-		return;
-
-	/*
-	 * This would be the place to create cpu topology based on MPIDR.
-	 *
-	 * However, it cannot be trusted to depict the actual topology; some
-	 * pieces of the architecture enforce an artificial cap on Aff0 values
-	 * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
-	 * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
-	 * having absolutely no relationship to the actual underlying system
-	 * topology, and cannot be reasonably used as core / package ID.
-	 *
-	 * If the MT bit is set, Aff0 *could* be used to define a thread ID, but
-	 * we still wouldn't be able to obtain a sane core ID. This means we
-	 * need to entirely ignore MPIDR for any topology deduction.
-	 */
-	cpuid_topo->thread_id  = -1;
-	cpuid_topo->core_id    = cpuid;
-	cpuid_topo->package_id = cpu_to_node(cpuid);
-
-	pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
-		 cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
-		 cpuid_topo->thread_id, mpidr);
-
-topology_populated:
-	update_siblings_masks(cpuid);
-}
-
 #ifdef CONFIG_ACPI
 static bool __init acpi_cpu_is_threaded(int cpu)
 {
-- 
2.37.0