linux-kernel - [PATCH v2 8/8] ARM: dts: qcom: add speedbin efuse nvmem node

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Date:   Thu,  7 Jul 2022 03:09:43 +0200
From:   Christian Marangi <ansuelsmth@...il.com>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Christian Marangi <ansuelsmth@...il.com>,
        Jonathan McDowell <noodles@...th.li>
Subject: [PATCH v2 8/8] ARM: dts: qcom: add speedbin efuse nvmem node

Add speedbin efuse nvmem cell needed for the opp table for the CPU
freqs.

Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
Tested-by: Jonathan McDowell <noodles@...th.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 69cf664851c6..71572028bc36 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -854,6 +854,9 @@ qfprom: qfprom@...000 {
 			reg = <0x00700000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+			speedbin_efuse: speedbin@c0 {
+				reg = <0xc0 0x4>;
+			};
 			tsens_calib: calib@400 {
 				reg = <0x400 0xb>;
 			};
-- 
2.36.1