lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAMdYzYo=Wft93OEKapVFx-oxe8ocU7OuhU+MOdqUw8-QjqzDGg@mail.gmail.com>
Date:   Fri, 8 Jul 2022 14:41:35 -0400
From:   Peter Geis <pgwipeout@...il.com>
To:     Robin Murphy <robin.murphy@....com>
Cc:     Frank Wunderlich <linux@...web.de>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        devicetree <devicetree@...r.kernel.org>,
        arm-mail-list <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-rtc@...r.kernel.org
Subject: Re: [PATCH 1/2] rtc: hym8563: try multiple times to init device

On Fri, Jul 8, 2022 at 12:18 PM Robin Murphy <robin.murphy@....com> wrote:
>
> On 2022-06-08 17:11, Frank Wunderlich wrote:
> > From: Peter Geis <pgwipeout@...il.com>
> >
> > RTC sometimes does not respond the first time in init.
> > Try multiple times to get a response.
>
> FWIW, given that HYM8563 is fairly common on RK3288 boards - I can't say
> I've ever noticed an issue with mine, for instance - it seems dubious
> that this would be a general issue of the chip itself. Are you sure it's
> not a SoC or board-level issue with the I2C bus being in a funny initial
> state, timings being marginal, or suchlike?

I don't think this is an SoC issue since this is the first instance
I've encountered it. Mind you we don't have the reset lines hooked up
at all for the Rockchip i2c driver, so it's possible that's the case,
but I'd imagine it would be observed more broadly if that was the
case. I've tried pushing the timings out pretty far as well as bumping
up the drive strength to no change. It seems to occur only with the
hym rtc used on this board. I suspect it's a new variant of the hym
that has slightly different behavior.

>
> Robin.
>
> > Signed-off-by: Peter Geis <pgwipeout@...il.com>
> > Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> > ---
> >   drivers/rtc/rtc-hym8563.c | 11 +++++++++--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
> > index 90e602e99d03..9adcedaa4613 100644
> > --- a/drivers/rtc/rtc-hym8563.c
> > +++ b/drivers/rtc/rtc-hym8563.c
> > @@ -13,6 +13,7 @@
> >   #include <linux/clk-provider.h>
> >   #include <linux/i2c.h>
> >   #include <linux/bcd.h>
> > +#include <linux/delay.h>
> >   #include <linux/rtc.h>
> >
> >   #define HYM8563_CTL1                0x00
> > @@ -438,10 +439,16 @@ static irqreturn_t hym8563_irq(int irq, void *dev_id)
> >
> >   static int hym8563_init_device(struct i2c_client *client)
> >   {
> > -     int ret;
> > +     int ret, i;
> >
> >       /* Clear stop flag if present */
> > -     ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
> > +     for (i = 0; i < 3; i++) {
> > +             ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
> > +             if (ret == 0)
> > +                     break;
> > +             msleep(20);
> > +     }
> > +
> >       if (ret < 0)
> >               return ret;
> >

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ