linux-kernel - Re: [PATCH v2 1/2] arm64: topology: move store_cpu

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Message-ID: <fb8534d9-baaa-2643-5119-602dfa5de758@microchip.com>
Date:   Fri, 8 Jul 2022 20:45:31 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <palmer@...osinc.com>, <aou@...s.berkeley.edu>,
        <sudeep.holla@....com>, <catalin.marinas@....com>,
        <will@...nel.org>, <gregkh@...uxfoundation.org>,
        <rafael@...nel.org>
CC:     <Daire.McNamara@...rochip.com>, <Conor.Dooley@...rochip.com>,
        <niklas.cassel@....com>, <damien.lemoal@...nsource.wdc.com>,
        <geert@...ux-m68k.org>, <zong.li@...ive.com>, <kernel@...il.dk>,
        <hahnjo@...njo.de>, <guoren@...nel.org>, <anup@...infault.org>,
        <atishp@...shpatra.org>, <heiko@...ech.de>,
        <philipp.tomsich@...ll.eu>, <robh@...nel.org>, <maz@...nel.org>,
        <viresh.kumar@...aro.org>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <Brice.Goglin@...ia.fr>
Subject: Re: [PATCH v2 1/2] arm64: topology: move store_cpu_topology() to
 shared code



On 08/07/2022 21:33, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> arm64's method of defining a default cpu topology requires only minimal
> changes to apply to RISC-V also. The current arm64 implementation exits
> early in a uniprocessor configuration by reading MPIDR & claiming that
> uniprocessor can rely on the default values.
> 
> This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
> topology: Stop using MPIDR for topology information")', because the
> current code just assigns default values for multiprocessor systems.
> 
> With the MPIDR references removed, store_cpu_topolgy() can be moved to
> the common arch_topology code.
> 
> CC: stable@...r.kernel.org
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
>  arch/arm64/kernel/topology.c | 40 ------------------------------------
>  drivers/base/arch_topology.c | 19 +++++++++++++++++
>  2 files changed, 19 insertions(+), 40 deletions(-)
> 
> diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
> index 869ffc4d4484..7889a00f5487 100644
> --- a/arch/arm64/kernel/topology.c
> +++ b/arch/arm64/kernel/topology.c
> @@ -22,46 +22,6 @@
>  #include <asm/cputype.h>
>  #include <asm/topology.h>
>  
> -void store_cpu_topology(unsigned int cpuid)
> -{
> -	struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
> -	u64 mpidr;
> -
> -	if (cpuid_topo->package_id != -1)
> -		goto topology_populated;
> -
> -	mpidr = read_cpuid_mpidr();
> -
> -	/* Uniprocessor systems can rely on default topology values */
> -	if (mpidr & MPIDR_UP_BITMASK)
> -		return;
> -
> -	/*
> -	 * This would be the place to create cpu topology based on MPIDR.
> -	 *
> -	 * However, it cannot be trusted to depict the actual topology; some
> -	 * pieces of the architecture enforce an artificial cap on Aff0 values
> -	 * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
> -	 * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
> -	 * having absolutely no relationship to the actual underlying system
> -	 * topology, and cannot be reasonably used as core / package ID.
> -	 *
> -	 * If the MT bit is set, Aff0 *could* be used to define a thread ID, but
> -	 * we still wouldn't be able to obtain a sane core ID. This means we
> -	 * need to entirely ignore MPIDR for any topology deduction.
> -	 */
> -	cpuid_topo->thread_id  = -1;
> -	cpuid_topo->core_id    = cpuid;
> -	cpuid_topo->package_id = cpu_to_node(cpuid);
> -
> -	pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
> -		 cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
> -		 cpuid_topo->thread_id, mpidr);
> -
> -topology_populated:
> -	update_siblings_masks(cpuid);
> -}
> -
>  #ifdef CONFIG_ACPI
>  static bool __init acpi_cpu_is_threaded(int cpu)
>  {
> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
> index 441e14ac33a4..07e84c6ac5c2 100644
> --- a/drivers/base/arch_topology.c
> +++ b/drivers/base/arch_topology.c
> @@ -765,6 +765,25 @@ void update_siblings_masks(unsigned int cpuid)
>  	}
>  }
>  
> +void __weak store_cpu_topology(unsigned int cpuid)

Ahh crap, I forgot to remove the __weak.
I won't immediately respin since it is minor. I've pushed it (without
the __weak) to https://git.kernel.org/conor/h/arch-topo so it'll get
the lkp coverage.

Thanks,
Conor.

> +{
> +	struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
> +
> +	if (cpuid_topo->package_id != -1)
> +		goto topology_populated;
> +
> +	cpuid_topo->thread_id = -1;
> +	cpuid_topo->core_id = cpuid;
> +	cpuid_topo->package_id = cpu_to_node(cpuid);
> +
> +	pr_debug("CPU%u: package %d core %d thread %d\n",
> +		 cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
> +		 cpuid_topo->thread_id);
> +
> +topology_populated:
> +	update_siblings_masks(cpuid);
> +}
> +
>  static void clear_cpu_topology(int cpu)
>  {
>  	struct cpu_topology *cpu_topo = &cpu_topology[cpu];