linux-kernel - Re: [PATCH] MMIO should have more priority then IO

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Message-ID: <25F843ED-7EB4-4D00-96CB-7DE1AC886460@vmware.com>
Date:   Fri, 8 Jul 2022 05:56:07 +0000
From:   Ajay Kaher <akaher@...are.com>
To:     Bjorn Helgaas <helgaas@...nel.org>,
        Matthew Wilcox <willy@...radead.org>
CC:     "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "rostedt@...dmis.org" <rostedt@...dmis.org>,
        Nadav Amit <namit@...are.com>,
        Srivatsa Bhat <srivatsab@...are.com>,
        "srivatsa@...il.mit.edu" <srivatsa@...il.mit.edu>,
        Alexey Makhalov <amakhalov@...are.com>,
        Anish Swaminathan <anishs@...are.com>,
        Vasavi Sirnapalli <vsirnapalli@...are.com>,
        "er.ajay.kaher@...il.com" <er.ajay.kaher@...il.com>
Subject: Re: [PATCH] MMIO should have more priority then IO


On 28/06/22, 11:39 PM, "Bjorn Helgaas" <helgaas@...nel.org> wrote:
> [+cc Matthew]
>
> On Tue, Jun 28, 2022 at 09:59:21PM +0530, Ajay Kaher wrote:
>> Port IO instructions (PIO) are less efficient than MMIO (memory
>> mapped I/O). They require twice as many PCI accesses and PIO
>> instructions are serializing. As a result, MMIO should be preferred
>> when possible over PIO.
>>
>> Bare metal test result
>> 1 million reads using raw_pci_read() took:
>> PIO: 0.433153 Sec.
>> MMIO: 0.268792 Sec.
>>
>> Virtual Machine test result
>> 1 hundred thousand reads using raw_pci_read() took:
>> PIO: 12.809 Sec.
>> MMIO: took 8.517 Sec.
>>
>> Signed-off-by: Ajay Kaher <akaher@...are.com>
>> ---
>>  arch/x86/pci/common.c          |  8 ++++----
>>  1 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
>> index 3507f456f..0b3383d9c 100644
>> --- a/arch/x86/pci/common.c
>> +++ b/arch/x86/pci/common.c
>> @@ -40,20 +40,20 @@ const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
>>  int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
>>                                               int reg, int len, u32 *val)
>>  {
>> +     if (raw_pci_ext_ops)
>> +             return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
>>       if (domain == 0 && reg < 256 && raw_pci_ops)
>>               return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
>> -     if (raw_pci_ext_ops)
>> -             return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
>>       return -EINVAL;
>
> This organization of raw_pci_read() dates to b6ce068a1285 ("Change
> pci_raw_ops to pci_raw_read/write"), by Matthew.  Cc'd him for
> comment, since I think he considered the ordering at the time.

Thanks Bjorn for quick response.

Matthew, b6ce068a1285 is old commit. It will be very helpful if you could
provide some detail on ordering as Bjorn mentioned above.

- Ajay

>>  }
>>
>>  int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
>>                                               int reg, int len, u32 val)
>>  {
>> +     if (raw_pci_ext_ops)
>> +             return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
>>       if (domain == 0 && reg < 256 && raw_pci_ops)
>>               return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
>> -     if (raw_pci_ext_ops)
>> -             return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
>>       return -EINVAL;
>>  }
>>
>> --
>> 2.30.0
>>