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Message-ID: <202207081056.RE0c8e5l-lkp@intel.com>
Date:   Fri, 8 Jul 2022 10:05:26 +0800
From:   kernel test robot <lkp@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Subject: [intel-tdx:guest-hardening-rebased 17/23]
 arch/x86/mm/mem_encrypt_amd.c:217:13: warning: no previous prototype for
 'sev_setup_arch'

tree:   https://github.com/intel/tdx.git guest-hardening-rebased
head:   64a4c4e66ca9cce1ca55de6d801f32284fbf7c8e
commit: 033b2ce6183a244e12aea7b4f0acee26a7153dec [17/23] x86/swiotlb: Adjust SWIOTLB bounce buffer size for TDX guests
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20220708/202207081056.RE0c8e5l-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
        # https://github.com/intel/tdx/commit/033b2ce6183a244e12aea7b4f0acee26a7153dec
        git remote add intel-tdx https://github.com/intel/tdx.git
        git fetch --no-tags intel-tdx guest-hardening-rebased
        git checkout 033b2ce6183a244e12aea7b4f0acee26a7153dec
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash arch/x86/coco/tdx/ arch/x86/mm/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

>> arch/x86/mm/mem_encrypt_amd.c:217:13: warning: no previous prototype for 'sev_setup_arch' [-Wmissing-prototypes]
     217 | void __init sev_setup_arch(void)
         |             ^~~~~~~~~~~~~~


vim +/sev_setup_arch +217 arch/x86/mm/mem_encrypt_amd.c

b9d05200bc12444 arch/x86/mm/mem_encrypt.c     Tom Lendacky  2017-07-17  216  
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10 @217  void __init sev_setup_arch(void)
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  218  {
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  219  	phys_addr_t total_mem = memblock_phys_mem_size();
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  220  	unsigned long size;
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  221  
4d96f9109109be9 arch/x86/mm/mem_encrypt.c     Tom Lendacky  2021-09-08  222  	if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  223  		return;
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  224  
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  225  	/*
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  226  	 * For SEV, all DMA has to occur via shared/unencrypted pages.
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  227  	 * SEV uses SWIOTLB to make this happen without changing device
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  228  	 * drivers. However, depending on the workload being run, the
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  229  	 * default 64MB of SWIOTLB may not be enough and SWIOTLB may
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  230  	 * run out of buffers for DMA, resulting in I/O errors and/or
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  231  	 * performance degradation especially with high I/O workloads.
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  232  	 *
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  233  	 * Adjust the default size of SWIOTLB for SEV guests using
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  234  	 * a percentage of guest memory for SWIOTLB buffers.
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  235  	 * Also, as the SWIOTLB bounce buffer memory is allocated
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  236  	 * from low memory, ensure that the adjusted size is within
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  237  	 * the limits of low available memory.
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  238  	 *
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  239  	 * The percentage of guest memory used here for SWIOTLB buffers
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  240  	 * is more of an approximation of the static adjustment which
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  241  	 * 64MB for <1G, and ~128M to 256M for 1G-to-4G, i.e., the 6%
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  242  	 */
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  243  	size = total_mem * 6 / 100;
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  244  	size = clamp_val(size, IO_TLB_DEFAULT_SIZE, SZ_1G);
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  245  	swiotlb_adjust_size(size);
3f9dfbebdc48ceb arch/x86/mm/mem_encrypt_amd.c Juergen Gross 2022-06-06  246  
3f9dfbebdc48ceb arch/x86/mm/mem_encrypt_amd.c Juergen Gross 2022-06-06  247  	/* Set restricted memory access for virtio. */
3f9dfbebdc48ceb arch/x86/mm/mem_encrypt_amd.c Juergen Gross 2022-06-06  248  	platform_set(PLATFORM_VIRTIO_RESTRICTED_MEM_ACCESS);
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  249  }
e998879d4fb7991 arch/x86/mm/mem_encrypt.c     Ashish Kalra  2020-12-10  250  

:::::: The code at line 217 was first introduced by commit
:::::: e998879d4fb7991856916972168cf27c0d86ed12 x86,swiotlb: Adjust SWIOTLB bounce buffer size for SEV guests

:::::: TO: Ashish Kalra <ashish.kalra@....com>
:::::: CC: Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

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