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Message-ID: <20220708021548.21453-3-xiangsheng.hou@mediatek.com>
Date:   Fri, 8 Jul 2022 10:15:48 +0800
From:   Xiangsheng Hou <xiangsheng.hou@...iatek.com>
To:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <matthias.bgg@...il.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <bin.zhang@...iatek.com>,
        <benliang.zhao@...iatek.com>, <linux-mediatek@...ts.infradead.org>,
        Xiangsheng Hou <xiangsheng.hou@...iatek.com>
Subject: [PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example

For mt8173, it is needed to add the axi clock for dma mode.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
---
 .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml         | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b09f..413b907eecf5 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -82,8 +82,8 @@ examples:
         compatible = "mediatek,mt8173-nor";
         reg = <0 0x1100d000 0 0xe0>;
         interrupts = <1>;
-        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
-        clock-names = "spi", "sf";
+        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
+        clock-names = "spi", "sf", "axi";
         #address-cells = <1>;
         #size-cells = <0>;
 
-- 
2.25.1

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