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Message-ID: <20220709065915.GG5063@thinkpad>
Date: Sat, 9 Jul 2022 12:29:15 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Johan Hovold <johan+linaro@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc8280xp: Add lost ranges for timer
On Thu, Jul 07, 2022 at 09:08:58AM -0700, Bjorn Andersson wrote:
> The timer node needs ranges specified to map the 1-cell children to the
> 2-cell address range used in /soc. This addition never made it into the
> patch that was posted and merged, so add it now.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 2bdb42c88311..37a4cd6f85b6 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1667,6 +1667,7 @@ timer@...20000 {
> reg = <0x0 0x17c20000 0x0 0x1000>;
> #address-cells = <1>;
> #size-cells = <1>;
> + ranges = <0 0 0 0x20000000>;
Even though this looks correct, I'm wondering why other SoCs are defining the
child addresses in 2 cells. I don't think the timer frames can go beyond 32bit
address space. Should we fix them too?
But for this patch,
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Thanks,
Mani
>
> frame@...21000 {
> frame-number = <0>;
> --
> 2.35.1
>
--
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