lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <2660a89ccbe160d5bba4b617edf44414d75b6259.camel@gmail.com>
Date:   Sun, 10 Jul 2022 19:30:40 +0200
From:   David Virag <virag.david003@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Tomasz Figa <tomasz.figa@...il.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Sam Protsenko <semen.protsenko@...aro.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org
Subject: Re: [PATCH 1/2] clk: samsung: exynos7885: Correct "div4" clock
 parents

On Fri, 2022-06-24 at 09:59 +0200, Krzysztof Kozlowski wrote:
> On 26/05/2022 09:21, Krzysztof Kozlowski wrote:
> > On 26/05/2022 07:58, David Virag wrote:
> > > "div4" DIVs which divide PLLs by 4 are actually dividing "div2"
> > > DIVs by
> > > 2 to achieve a by 4 division, thus their parents are the
> > > respective
> > > "div2" DIVs. These DIVs were mistakenly set to have the PLLs as
> > > parents.
> > > This leads to the kernel thinking "div4"s and everything under
> > > them run
> > > at 2x the clock speed. Fix this.
> > > 
> > > Fixes: 45bd8166a1d8 ("clk: samsung: Add initial Exynos7885 clock
> > > driver")
> > > Signed-off-by: David Virag <virag.david003@...il.com>
> > > ---
> > >  drivers/clk/samsung/clk-exynos7885.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> Sylwester,
> 
> This goes to v5.20?
> 
> Best regards,
> Krzysztof

Hi Krzysztof and Sylwester,

What is going on with this patch? What will happen to it? From what
I've seen, Sylwester doesn't seem to be too active lately. I just don't
want it to get lost. With only one of the patches applied, UART is
partially broken on 7885. Don't want to make unnecessary noise, but
this patch should probably be applied sooner than later.

Best regards,
David

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ