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Message-ID: <CAHp75Vdso_PGUomjmKaF1ytdUe4qLeAbpwkNmcRng9aNHs7g8w@mail.gmail.com>
Date:   Sun, 10 Jul 2022 21:06:41 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Icenowy Zheng <uwu@...nowy.me>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Samuel Holland <samuel@...lland.org>,
        Maxime Ripard <mripard@...nel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        linux-sunxi@...ts.linux.dev,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Maxime Ripard <maxime@...no.tech>
Subject: Re: [PATCH v2 2/3] pinctrl: sunxi: add support for R329 CPUX pin controller

On Sun, Jul 10, 2022 at 10:22 AM Icenowy Zheng <uwu@...nowy.me> wrote:
>
> Allwinner R329 SoC has two pin controllers similar to ones on previous
> SoCs, one in CPUX power domain and another in CPUS.
>
> This patch adds support for the CPUX domain pin controller.

...

> +#include <linux/module.h>
> +#include <linux/platform_device.h>

> +#include <linux/of.h>
> +#include <linux/of_device.h>

No use of these.

> +#include <linux/pinctrl/pinctrl.h>

Missed headers:
mod_devicetable.h

> +#include "pinctrl-sunxi.h"

-- 
With Best Regards,
Andy Shevchenko

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