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Message-ID: <20220711132348.GB3771@pengutronix.de>
Date: Mon, 11 Jul 2022 15:23:48 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
linux-clk@...r.kernel.org, linux-mips@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v6 6/7] clk: baikal-t1: Add DDR/PCIe directly controlled
resets support
On Fri, Jul 08, 2022 at 10:27:24PM +0300, Serge Semin wrote:
> Aside with a set of the trigger-like resets Baikal-T1 CCU provides two
> additional blocks with directly controlled reset signals. In particular it
> concerns DDR full and initial resets and various PCIe sub-domains resets.
> Let's add the direct reset assertion/de-assertion of the corresponding
> flags support into the Baikal-T1 CCU driver then. It will be required at
> least for the PCIe platform driver. Obviously the DDR controller isn't
> supposed to be fully reset in the kernel, so the corresponding controls
> are added just for the sake of the interface implementation completeness.
>
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
>
> ---
>
> Changelog v6:
> - Refactor the code to support the linear reset IDs only. (@Philipp)
> ---
> drivers/clk/baikal-t1/ccu-rst.c | 67 +++++++++++++++++++++++++++++
> drivers/clk/baikal-t1/ccu-rst.h | 10 +++++
> include/dt-bindings/reset/bt1-ccu.h | 9 ++++
> 3 files changed, 86 insertions(+)
>
> diff --git a/drivers/clk/baikal-t1/ccu-rst.c b/drivers/clk/baikal-t1/ccu-rst.c
> index 8fd40810d24e..c20aa3e07afb 100644
> --- a/drivers/clk/baikal-t1/ccu-rst.c
> +++ b/drivers/clk/baikal-t1/ccu-rst.c
> @@ -35,18 +35,29 @@
> #define CCU_AXI_HWA_BASE 0x054
> #define CCU_AXI_SRAM_BASE 0x058
>
> +#define CCU_SYS_DDR_BASE 0x02c
> #define CCU_SYS_SATA_REF_BASE 0x060
> #define CCU_SYS_APB_BASE 0x064
> +#define CCU_SYS_PCIE_BASE 0x144
>
> #define CCU_RST_DELAY_US 1
>
> #define CCU_RST_TRIG(_base, _ofs) \
> { \
> + .type = CCU_RST_TRIG, \
> + .base = _base, \
> + .mask = BIT(_ofs), \
> + }
> +
> +#define CCU_RST_DIR(_base, _ofs) \
> + { \
> + .type = CCU_RST_DIR, \
> .base = _base, \
> .mask = BIT(_ofs), \
> }
>
> struct ccu_rst_info {
> + enum ccu_rst_type type;
> unsigned int base;
> unsigned int mask;
> };
> @@ -77,8 +88,18 @@ static const struct ccu_rst_info axi_rst_info[] = {
> * well while the Linux kernel is working.
> */
> static const struct ccu_rst_info sys_rst_info[] = {
> +
Please drop this empty line. Otherwise,
Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
regards
Philipp
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