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Message-ID: <ef5d82ec-22ab-298f-740d-e86cb7fe3046@linaro.org>
Date: Mon, 11 Jul 2022 17:18:39 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Vinod Polimera <quic_vpolimer@...cinc.com>,
dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, robdclark@...il.com,
dianders@...omium.org, swboyd@...omium.org,
quic_kalyant@...cinc.com, quic_khsieh@...cinc.com,
quic_vproddut@...cinc.com, bjorn.andersson@...aro.org,
quic_aravindh@...cinc.com, quic_abhinavk@...cinc.com,
quic_sbillaka@...cinc.com
Subject: Re: [PATCH v6 05/10] drm/msm/dp: use the eDP bridge ops to validate
eDP modes
On 11/07/2022 15:56, Vinod Polimera wrote:
> The eDP and DP interfaces shared the bridge operations and
> the eDP specific changes were implemented under is_edp check.
> To add psr support for eDP, we started using a new set of eDP
> bridge ops. We are moving the eDP specific code in the
> dp_bridge_mode_valid function to a new eDP function,
> edp_bridge_mode_valid under the eDP bridge ops.
>
> Signed-off-by: Sankeerth Billakanti <quic_sbillaka@...cinc.com>
> Signed-off-by: Vinod Polimera <quic_vpolimer@...cinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/gpu/drm/msm/dp/dp_display.c | 8 --------
> drivers/gpu/drm/msm/dp/dp_drm.c | 34 +++++++++++++++++++++++++++++++++-
> 2 files changed, 33 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 64a6254..2b3ec6b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -986,14 +986,6 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge,
> return -EINVAL;
> }
>
> - /*
> - * The eDP controller currently does not have a reliable way of
> - * enabling panel power to read sink capabilities. So, we rely
> - * on the panel driver to populate only supported modes for now.
> - */
> - if (dp->is_edp)
> - return MODE_OK;
> -
> if (mode->clock > DP_MAX_PIXEL_CLK_KHZ)
> return MODE_BAD;
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
> index 8ca0b37..2bf8c8d 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.c
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.c
> @@ -181,12 +181,44 @@ static void edp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge,
> dp_bridge_atomic_post_disable(drm_bridge, old_bridge_state);
> }
>
> +/**
> + * edp_bridge_mode_valid - callback to determine if specified mode is valid
> + * @bridge: Pointer to drm bridge structure
> + * @info: display info
> + * @mode: Pointer to drm mode structure
> + * Returns: Validity status for specified mode
> + */
> +static enum drm_mode_status edp_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_info *info,
> + const struct drm_display_mode *mode)
> +{
> + struct msm_dp *dp;
> + int mode_pclk_khz = mode->clock;
> +
> + dp = to_dp_bridge(bridge)->dp_display;
> +
> + if (!dp || !mode_pclk_khz || !dp->connector) {
> + DRM_ERROR("invalid params\n");
> + return -EINVAL;
> + }
> +
> + if (mode->clock > DP_MAX_PIXEL_CLK_KHZ)
> + return MODE_CLOCK_HIGH;
> +
> + /*
> + * The eDP controller currently does not have a reliable way of
> + * enabling panel power to read sink capabilities. So, we rely
> + * on the panel driver to populate only supported modes for now.
> + */
> + return MODE_OK;
> +}
> +
> static const struct drm_bridge_funcs edp_bridge_ops = {
> .atomic_enable = edp_bridge_atomic_enable,
> .atomic_disable = edp_bridge_atomic_disable,
> .atomic_post_disable = edp_bridge_atomic_post_disable,
> .mode_set = dp_bridge_mode_set,
> - .mode_valid = dp_bridge_mode_valid,
> + .mode_valid = edp_bridge_mode_valid,
> .atomic_reset = drm_atomic_helper_bridge_reset,
> .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
--
With best wishes
Dmitry
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