linux-kernel - [v3 0/5] Miscallenous improvement & fixes for the PMU driver

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Message-Id: <20220711174632.4186047-1-atishp@rivosinc.com>
Date:   Mon, 11 Jul 2022 10:46:27 -0700
From:   Atish Patra <atishp@...osinc.com>
To:     linux-kernel@...r.kernel.org
Cc:     Atish Patra <atishp@...osinc.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Anup Patel <anup@...infault.org>,
        Atish Patra <atishp@...shpatra.org>,
        Guo Ren <guoren@...nel.org>, linux-riscv@...ts.infradead.org,
        Mark Rutland <mark.rutland@....com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Will Deacon <will@...nel.org>
Subject: [v3  0/5] Miscallenous improvement & fixes for the PMU driver

This series fixes issues PMU driver code.
PATCH 1 & 3 are fixes for rv32 while PATCH 2 fixes a redundant
user page update issue during counter start.

PATCH 4 & 5 improves the SBI PMU definition.

Changes from v2->v3:
1. Added two more patches that fixes few typos and enable support
for perf support in KVM.

Changes from v1->v2:
1. Add proper compile time rv32 checks.

Atish Patra (5):
RISC-V: Fix counter restart during overflow for RV32
RISC-V: Update user page mapping only once during start
RISC-V: Fix SBI PMU calls for RV32
RISC-V: Move counter info definition to sbi header file
RISC-V: Improve SBI definitions

arch/riscv/include/asm/sbi.h | 32 ++++++++++++++++++++++++++++++--
drivers/perf/riscv_pmu.c     |  1 -
drivers/perf/riscv_pmu_sbi.c | 30 ++++++++++++++++--------------
3 files changed, 46 insertions(+), 17 deletions(-)

--
2.25.1