linux-kernel - [PATCH v1 1/2] dt-bindings: riscv: document the sifive e24

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Message-Id: <20220711184325.1367393-2-mail@conchuod.ie>
Date:   Mon, 11 Jul 2022 19:43:25 +0100
From:   Conor Dooley <mail@...chuod.ie>
To:     Emil Renner Berthing <kernel@...il.dk>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Anup Patel <anup@...infault.org>,
        Conor Dooley <conor.dooley@...rochip.com>
Cc:     devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v1 1/2] dt-bindings: riscv: document the sifive e24

From: Conor Dooley <conor.dooley@...rochip.com>

The SiFive E24 is a 32 bit monitor core present on the JH7100.

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index d632ac76532e..195e762094a8 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -29,6 +29,7 @@ properties:
           - enum:
               - sifive,rocket0
               - sifive,bullet0
+              - sifive,e24
               - sifive,e5
               - sifive,e7
               - sifive,e71
@@ -75,6 +76,7 @@ properties:
       lowercase to simplify parsing.
     $ref: "/schemas/types.yaml#/definitions/string"
     enum:
+      - rv32imafc
       - rv64imac
       - rv64imafdc
 
-- 
2.37.0