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Message-ID: <CADnq5_Nviz6D4NX3-gj1_=0M-+-0Bi=_Lqczqsm-tjvKQp4Vsw@mail.gmail.com>
Date:   Mon, 11 Jul 2022 15:26:46 -0400
From:   Alex Deucher <alexdeucher@...il.com>
To:     André Almeida <andrealmeid@...lia.com>
Cc:     Alex Deucher <alexander.deucher@....com>,
        Christian König <christian.koenig@....com>,
        Pan Xinhui <Xinhui.Pan@....com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Hawking Zhang <Hawking.Zhang@....com>,
        Tao Zhou <tao.zhou1@....com>,
        Felix Kuehling <Felix.Kuehling@....com>,
        Jack Xiao <Jack.Xiao@....com>,
        amd-gfx list <amd-gfx@...ts.freedesktop.org>,
        Maling list - DRI developers 
        <dri-devel@...ts.freedesktop.org>,
        LKML <linux-kernel@...r.kernel.org>, kernel-dev@...lia.com
Subject: Re: [PATCH 1/2] drm/amd/pm: Add GFXOFF registers for vangogh

On Mon, Jul 11, 2022 at 3:20 PM André Almeida <andrealmeid@...lia.com> wrote:
>
> Add register values to access GFXOFF data for vangogh GPU.
>
> Signed-off-by: André Almeida <andrealmeid@...lia.com>
> ---
>  .../pm/swsmu/inc/pmfw_if/smu11_driver_if_vangogh.h   | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_vangogh.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_vangogh.h
> index 8361ebd8d876..9c7b0004d842 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_vangogh.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_vangogh.h
> @@ -279,4 +279,16 @@ typedef enum {
>  #define TILE_ISPPRE_MASK    ((1<<6) | (1<<7))
>  #define TILE_ISPPOST_MASK   ((1<<8) | (1<<9))
>
> +// Registers related to GFXOFF
> +// addressBlock: smuio_smuio_SmuSmuioDec
> +// base address: 0x5a000
> +#define mmSMUIO_GFX_MISC_CNTL                  0x00c5
> +#define mmSMUIO_GFX_MISC_CNTL_BASE_IDX         0
> +
> +//SMUIO_GFX_MISC_CNTL
> +#define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff__SHIFT     0x0
> +#define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS__SHIFT          0x1
> +#define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff_MASK       0x00000001L
> +#define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS_MASK            0x00000006L

These are registers rather than firmware interfaces so they don't
really belong in this header.  I'd suggest just putting these directly
in vangogh_ppt.c.  You can also squash this in with patch2 while you
are at it if you want.

Alex


> +
>  #endif
> --
> 2.37.0
>

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